MC100LVEL90DWR2 datasheet(1/6 Pages) ONSEMI

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November, 2006 − Rev. 11

1

Publication Order Number:

MC100LVEL90/D

MC100LVEL90

−3.3V / −5VTriple ECL Input

to LVPECL Output Translator

Description

The MC100LVEL90 is a triple ECL to LVPECL translator. The device

receives either −3.3 V or −5 V differential ECL signals, determined by the

VEE supply level, and translates them to +3.3 V differential LVPECL

output signals.

To accomplish the level translation, the LVEL90 requires three power

rails. The VCC supply should be connected to the positive supply, and the

VEE pin should be connected to the negative power supply. The GND

pins, as expected, are connected to the system ground plane. Both VEE

and VCC should be bypassed to ground via 0.01 mF capacitors.

Under open input conditions, the D input will be biased at VEE/2 and

the D input will be pulled to VEE. This condition will force the Q output

to a LOW, ensuring stability.

The VBB pin, an internally generated voltage supply, is available to this

device only. For single-ended input conditions, the unused differential

input is connected to VBB as a switching reference voltage. VBB may also

rebias AC coupled inputs. When used, decouple VBB and VCC via a

0.01

mF capacitor and limit current sourcing or sinking to 0.5 mA. When

not used, VBB should be left open.

Features

• 500 ps Propagation Delays

• ESD Protection: >2 kV HBM, >200 V MM

• The 100 Series Contains Temperature Compensation

• Operating Range: VCC = 3.0 V to 3.8 V;

VEE = −3.0 V to −5.5 V; GND = 0 V

• Internal Input Pulldown Resistors

• Q Output will Default LOW with Inputs Open or at VEE

• Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test

• Moisture Sensitivity;

Pb Pkg

Level 1,

Pb−Free Pkg

Level 3

For Additional Information, see Application Note AND8003/D

• Flammability Rating: UL 94 V−0 @ 0.125 in,

Oxygen Index: 28 to 34

• Transistor Count = 261 devices

• Pb−Free Packages are Available*

*For additional information on our Pb−Free strategy and soldering details, please

download the ON Semiconductor Soldering and Mounting Techniques

Reference Manual, SOLDERRM/D.

http://onsemi.com

See detailed ordering and shipping information in the package

dimensions section on page 5 of this data sheet.

ORDERING INFORMATION

*For additional marking information, refer to

Application Note AND8002/D.

MARKING DIAGRAM*

A

= Assembly Location

WL

= Wafer Lot

YY

= Year

WW

= Work Week

G

= Pb−Free Package

SO−20 WB

DW SUFFIX

CASE 751D

20

1

100LVEL90

AWLYYWWG

Số phần tương tự - MC100LVEL90DWR2

nhà sản xuất	tên linh kiện	bảng dữ liệu	Giải thích chi tiết về linh kiện
ON Semiconductor	MC100LVEL90DWR2G	149Kb / 5P	-3.3V / -5V Triple ECL Input to LVPECL Output Translator July, 2016 ??Rev. 12

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nhà sản xuất	tên linh kiện	bảng dữ liệu	Giải thích chi tiết về linh kiện
ON Semiconductor	MC10EP90	136Kb / 9P	??.3V / ??V Triple ECL Input to LVPECL/PECL Output Translator November, 2006 ??Rev. 6
	MC100EL90	111Kb / 5P	??.3V / ??V Triple ECL Input to PECL Output Translator November, 2006 ??Rev. 3
	MC10EP90	92Kb / 9P	Triple ECL Input to LVPECL/PECL Output Translator May, 2014 ??Rev. 7
	MC100LVEL90	149Kb / 5P	-3.3V / -5V Triple ECL Input to LVPECL Output Translator July, 2016 ??Rev. 12
	MC100LVEL91	146Kb / 6P	3.3 V Triple LVPECL Input to -3.3 V to -5.0 V ECL Output Translator July, 2016 ??Rev. 12
	MC100LVEL91	111Kb / 6P	3.3 V Triple LVPECL Input to ??.3 V to ??.0 V ECL Output Translator November, 2006 ??Rev. 10
	MC10EP90	68Kb / 8P	-3.3V / -5V Triple ECL Input to LVPECL/PECL Output Translator June, 2004 ??Rev. 4
	MC100EL91	111Kb / 6P	5 V Triple PECL Input to ?? V ECL Output Translator November, 2006 ??Rev. 6
	MC100LVEL92	147Kb / 5P	5V Triple PECL Input to LVPECL Output Translator July, 2016 ??Rev. 13
	MC100EL90	147Kb / 6P	-3.3 V / -5V Triple ECL Input to PECL Output Translator July, 2016 ??Rev. 4

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