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MC100LVEL34DTG bảng dữ liệu(PDF) 4 Page - ON Semiconductor

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Giải thích chi tiết về linh kiện  3.3V ECL 첨2, 첨4, 첨8 Clock Generation Chip
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Table 6. 100LVEL DC CHARACTERISTICS, NECL VCC = 0 V, VEE = −3.8 V to −3.0 V (Note 5)
Symbol
Characteristic
−40°C
25°C
85°C
Unit
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
IEE
Power Supply Current
23
30
40
23
30
40
23
30
40
mA
IEE
Power Supply Current
40
50
60
40
50
60
42
52
62
mA
VOH
Output HIGH Voltage (Note 6)
−1145 −1020
−895
−1145 −1020
−895
−1145 −1020
−895
mV
VOL
Output LOW Voltage (Note 6)
−1945 −1700 −1575 −1945 −1700 −1575 −1945 −1700 −1575
mV
VIH
Input HIGH Voltage (Single−Ended)
−1225
−880
−1225
−880
−1225
−880
mV
VIL
Input LOW Voltage (Single−Ended)
−1945
−1625 −1945
−1625 −1945
−1625
mV
VBB
Output Voltage Reference
−1525 −1425 −1325 −1525 −1425 −1325 −1525 −1425 −1325
mV
VIHCMR
Input HIGH Voltage Common Mode
Range (Differential Configuration)
(Note 7)
VEE + 1.2
0.0
VEE + 1.2
0.0
VEE + 1.2
0.0
V
IIH
Input HIGH Current
150
150
150
mA
IIL
Input LOW Current
D
D
0.5
−150
0.5
−150
0.5
−150
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
5. Input and output parameters vary 1:1 with VCC.
6. All loading with 50 W to VCC − 2.0 V.
7. VIHCMR min varies 1:1 with VEE, VIHCMR max varies 1:1 with VCC. The VIHCMR range is referenced to the most positive side of the differential
input signal.
Table 7. AC CHARACTERISTICS VCC = 0 V; VEE = −3.0 V to −5.5 V or VCC = 3.0 V to 5.5 V; VEE = 0 V (Note 8)
Symbol
Characteristic
−40°C
25°C
85°C
Unit
Min
Typ
Max
Min
Typ
Max
Min
Typ
Max
fmax
Maximum Toggle Frequency (Figure 4)
1.5
1.5
1.5
GHz
tPLH
tPHL
Propagation
CLK to Q0, Q1, Q2
Delay to Output
MR to Q
550
500
650
600
1000
1000
600
550
700
650
1000
1000
650
600
750
700
1000
1000
ps
tJITTER
Cycle−to−Cycle Jitter (Figure 4)
< 1
< 1
< 1
ps
tS
Setup Time EN
150
50
150
50
150
50
ps
tH
Hold Time EN
200
100
200
100
200
100
ps
tRR
Set/Reset Recovery
300
200
300
200
300
200
ps
VPP
Input Swing (Note 9)
150
1000
150
1000
150
1000
mV
tr
tf
Output Rise/Fall Times Q
(20% − 80%)
120
170
400
140
180
400
160
200
400
ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
8. Measured using a 750 mV source, 50% duty cycle clock source. All loading with 50 W to VCC − 2.0 V.
9. VPP(min) is minimum input swing for which AC parameters guaranteed. The device has a DC gain of 940.


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