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MC100LVEL29DWR2G bảng dữ liệu(PDF) 2 Page - ON Semiconductor |
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2 / 6 page MC100LVEL29 http://onsemi.com 2 VBB Figure 1. Logic Diagram and Pinout: 20-Lead SOIC (Top View) CLK0 D1 CLK1 17 18 16 15 14 13 12 4 3 5678 9 Q0 11 10 Q0 S0 S1 VCC Q1 Q1 VEE D0 19 20 2 1 R0 VCC CLK0 D1 D0 CLK1 R1 CLK D S R Q Q CLK D R S Q Q R L L H L H S L L L H H D L H X X X CLK Z Z X X X Q L H L H Undef Z = LOW to HIGH Transition X = Don’t Care Q H L H L Undef Table 1. PIN DESCRIPTION FUNCTION ECL Differential Data Inputs ECL Reset Inputs ECL Differential Clock Inputs ECL Differential Clock Inputs ECL Set Inputs ECL Differential Data Outputs Reference Voltage Output Positive Supply Negative Supply PIN D0, D0; D1, D1 R0, R1 CLK0, CLK0 CLK1, CLK1 S0, S1 Q0, Q0; Q1, Q1 VBB VCC VEE Warning: All VCC and VEE pins must be externally connected to Power Supply to guarantee proper operation. Table 2. TRUTH TABLE Table 3. MAXIMUM RATINGS Symbol Parameter Condition 1 Condition 2 Rating Unit VCC PECL Mode Power Supply VEE = 0 V 8 to 0 V VEE NECL Mode Power Supply VCC = 0 V −8 to 0 V VI PECL Mode Input Voltage NECL Mode Input Voltage VEE = 0 V VCC = 0 V VI VCC VI VEE 6 to 0 −6 to 0 V V Iout Output Current Continuous Surge 50 100 mA mA IBB VBB Sink/Source ± 0.5 mA TA Operating Temperature Range −40 to +85 °C Tstg Storage Temperature Range −65 to +150 °C qJA Thermal Resistance (Junction to Ambient) 0 lfpm 500 lfpm 20 SOIC 20 SOIC 90 60 °C/W °C/W qJC Thermal Resistance (Junction to Case) Standard Board 20 SOIC 30 to 35 °C/W Tsol Wave Solder Pb Pb−Free <2 to 3 sec @ 248°C <2 to 3 sec @ 260°C 265 265 °C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. |
Số phần tương tự - MC100LVEL29DWR2G |
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Mô tả tương tự - MC100LVEL29DWR2G |
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