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MC74LVXT8051D bảng dữ liệu(PDF) 4 Page - ON Semiconductor

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Giải thích chi tiết về linh kiện  Analog Multiplexer / Demultiplexer High?뭁erformance Silicon?묰ate CMOS
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DC ELECTRICAL CHARACTERISTICS Analog Section
Guaranteed Limit
Symbol
Parameter
Test Conditions
VCC
V
−55 to 25
°C
v
85
_C
v
125
_C
Unit
Ron
Maximum “ON” Resistance
Vin = VIL or VIH
VIS = VCC to GND
|IS| v 10.0 mA (Figures 1, 2)
3.0
4.5
5.5
40
30
25
45
32
28
50
37
30
W
Vin = VIL or VIH
VIS = VCC or GND (Endpoints)
|IS| v 10.0 mA (Figures 1, 2)
3.0
4.5
5.5
30
25
20
35
28
25
40
35
30
DRon
Maximum Difference in “ON”
Resistance Between Any Two
Channels in the Same Package
Vin = VIL or VIH
VIS = 1/2 (VCC − GND)
|IS| v 10.0 mA
3.0
4.5
5.5
15
8.0
8.0
20
12
12
25
15
15
W
Ioff
Maximum Off−Channel Leakage
Current, Any One Channel
Vin = VIL or VIH;
VIO = VCC or GND;
Switch Off (Figure 3)
5.5
0.1
0.5
1.0
mA
Maximum Off−Channel
Leakage Current,
Common Channel
Vin = VIL or VIH;
VIO = VCC or GND;
Switch Off (Figure 4)
5.5
0.2
2.0
4.0
Ion
Maximum On−Channel
Leakage Current,
Channel−to−Channel
Vin = VIL or VIH;
Switch−to−Switch =
VCC or GND; (Figure 5)
5.5
0.2
2.0
4.0
mA
AC CHARACTERISTICS (CL = 50 pF, Input tr = tf = 3 ns)
VCC
Guaranteed Limit
Symbol
Parameter
VCC
V
−55 to 25
°C
≤85°C
≤125°C
Unit
tPLH,
tPHL
Maximum Propagation Delay, Channel−Select to Analog Output
(Figure 9)
2.0
3.0
4.5
5.5
30
20
15
15
35
25
18
18
40
30
22
20
ns
tPLH,
tPHL
Maximum Propagation Delay, Analog Input to Analog Output
(Figure 10)
2.0
3.0
4.5
5.5
4.0
3.0
1.0
1.0
6.0
5.0
2.0
2.0
8.0
6.0
2.0
2.0
ns
tPLZ,
tPHZ
Maximum Propagation Delay, Enable to Analog Output
(Figure 11)
2.0
3.0
4.5
5.5
30
20
15
15
35
25
18
18
40
30
22
20
ns
tPZL,
tPZH
Maximum Propagation Delay, Enable to Analog Output
(Figure 11)
2.0
3.0
4.5
5.5
20
12
8.0
8.0
25
14
10
10
30
15
12
12
ns
Cin
Maximum Input Capacitance, Channel−Select or Enable Inputs
10
10
10
pF
CI/O
Maximum Capacitance
Analog I/O
35
35
35
pF
(All Switches Off)
Common O/I
130
130
130
Feedthrough
1.0
1.0
1.0
Typical @ 25
°C, VCC = 5.0 V
CPD
Power Dissipation Capacitance (Figure 13)*
45
pF
* Used to determine the no−load dynamic power consumption: PD = CPD VCC2f + ICC VCC.


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