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MC74HC03AD bảng dữ liệu(PDF) 4 Page - ON Semiconductor |
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MC74HC03AD bảng dữ liệu(HTML) 4 Page - ON Semiconductor |
4 / 9 page MC74HC03A http://onsemi.com 4 DC CHARACTERISTICS (Voltages Referenced to GND) VCC V Guaranteed Limit Symbol Parameter Condition −55 to 25°C ≤85°C ≤125°C Unit VIH Minimum High−Level Input Voltage Vout = 0.1V or VCC −0.1V |Iout| ≤ 20mA 2.0 3.0 4.5 6.0 1.50 2.10 3.15 4.20 1.50 2.10 3.15 4.20 1.50 2.10 3.15 4.20 V VIL Maximum Low−Level Input Voltage Vout = 0.1V or VCC − 0.1V |Iout| ≤ 20mA 2.0 3.0 4.5 6.0 0.50 0.90 1.35 1.80 0.50 0.90 1.35 1.80 0.50 0.90 1.35 1.80 V VOL Maximum Low−Level Output Voltage Vout = 0.1V or VCC − 0.1V |Iout| ≤ 20mA 2.0 4.5 6.0 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 0.1 V Vin = VIH or VIL |Iout| ≤ 2.4mA |Iout| ≤ 4.0mA |Iout| ≤ 5.2mA 3.0 4.5 6.0 0.26 0.26 0.26 0.33 0.33 0.33 0.40 0.40 0.40 Iin Maximum Input Leakage Current Vin = VCC or GND 6.0 ±0.1 ±1.0 ±1.0 mA ICC Maximum Quiescent Supply Current (per Package) Vin = VCC or GND Iout = 0mA 6.0 1.0 10 40 mA IOZ Maximum Three−State Leakage Current Output in High−Impedance State Vin = VIL or VIH Vout = VCC or GND 6.0 ±0.5 ±5.0 ±10 mA NOTE: Information on typical parametric values can be found in Chapter 2 of the ON Semiconductor High−Speed CMOS Data Book (DL129/D). AC CHARACTERISTICS (CL = 50pF, Input tr = tf = 6ns) VCC V Guaranteed Limit Symbol Parameter −55 to 25°C ≤85°C ≤125°C Unit tPLZ, tPZL Maximum Propagation Delay, Input A or B to Output Y (Figures 1 and 2) 2.0 3.0 4.5 6.0 120 45 24 20 150 60 30 26 180 75 36 31 ns tTLH, tTHL Maximum Output Transition Time, Any Output (Figures 1 and 2) 2.0 3.0 4.5 6.0 75 27 15 13 95 32 19 16 110 36 22 19 ns Cin Maximum Input Capacitance 10 10 10 pF Cout Maximum Three−State Output Capacitance (Output in High−Impedance State) 10 10 10 pF NOTE: For propagation delays with loads other than 50 pF, and information on typical parametric values, see Chapter 2 of the ON Semiconductor High−Speed CMOS Data Book (DL129/D). CPD Power Dissipation Capacitance (Per Buffer)* Typical @ 25°C, VCC = 5.0 V, VEE = 0 V pF 8.0 * Used to determine the no−load dynamic power consumption: PD = CPD VCC2f + ICC VCC. For load considerations, see Chapter 2 of the ON Semiconductor High−Speed CMOS Data Book (DL129/D). |
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