MC74HCT373A

http://onsemi.com

4

Additional Quiescent Supply

Current

5.5

≥ −55°C

25°C to 125°C

mA

2.9

2.4

NOTE: Information on typical parametric values can be found in Chapter 2 of the ON Semiconductor High−Speed CMOS Data Book

(DL129/D).

Symbol

Parameter

Guaranteed Limit

Unit

– 55 to

25°C

v 85°C

v 125°C

Maximum Propagation Delay, Input D to Q

(Figures 1 and 5)

28

35

42

ns

Maximum Propagation Delay, Latch Enable to Q

(Figures 2 and 5)

32

40

48

ns

Maximum Propagation Delay, Output Enable to Q

(Figures 3 and 6)

30

38

45

ns

Maximum Propagation Delay, Output Enable to Q

(Figures 3 and 6)

35

44

53

ns

Maximum Output Transition Time, Any Output

(Figures 1 and 5)

12

15

18

ns

Maximum Input Capacitance

10

10

10

pF

Maximum Three−State Output Capacitance

(Output in High−Impedance State)

15

15

15

pF

NOTE: For propagation delays with loads other than 50 pF, and information on typical parametric values, see Chapter 2 of the ON

Semiconductor High−Speed CMOS Data Book (DL129/D).

Power Dissipation Capacitance (Per Latch)*

pF

65

ON Semiconductor High−Speed CMOS Data Book (DL129/D).

Symbol

Parameter

Guaranteed Limit

Unit

– 55 to

25°C

v 85°C

v 125°C

Minimum Setup Time, Input D to Latch Enable

(Figure 4)

10

13

15

ns

Minimum Hold Time, Latch Enable to Input D

(Figure 4)

10

13

15

ns

Minimum Pulse Width, Latch Enable

(Figure 2)

12

15

18

ns

Maximum Input Rise and Fall Times

(Figure 1)

500

500

500

ns