MC74HCT273ADWR2 datasheet(2/8 Pages) ONSEMI

tên linh kiện	MC74HCT273ADWR2

Giải thích chi tiết về linh kiện	Octal D Flip?묯lop with Common Clock and Reset with LSTTL?묬ompatible Inputs

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MC74HCT273A

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LOGIC DIAGRAM

DATA

INPUTS

D0

11

CLOCK

D1

D2

D3

D4

D5

D6

D7 18

17

14

13

8

7

4

3

1

RESET

19

Q0

Q1

Q2

Q3

Q4

Q5

Q6

Q7

16

15

12

9

6

5

2

PIN 20 = VCC

PIN 10 = GND

NONINVERTING

OUTPUTS

FUNCTION TABLE

Inputs

Output

Reset Clock

D

Q

LX

X

L

HH

H

HL

L

H

L

X

No Change

H

X

No Change

X = Don’t Care

Z = High Impedance

MAXIMUM RATINGS*

Symbol

Parameter

Value

Unit

VCC

DC Supply Voltage (Referenced to GND)

– 0.5 to + 7.0

V

Vin

DC Input Voltage (Referenced to GND)

– 0.5 to VCC + 0.5

V

Vout

DC Output Voltage (Referenced to GND)

– 0.5 to VCC + 0.5

V

Iin

DC Input Current, per Pin

± 20

mA

Iout

DC Output Current, per Pin

± 25

mA

ICC

DC Supply Current, VCC and GND Pins

± 50

mA

PD

Power Dissipation in Still Air

Plastic DIP†

SOIC Package†

750

500

mW

Tstg

Storage Temperature

– 65 to + 150

_C

TL

Lead Temperature, 1 mm from Case for 10 Seconds

(SOIC or Plastic DIP)

260

_C

*Maximum Ratings are those values beyond which damage to the device may occur.

Functional operation should be restricted to the Recommended Operating Conditions.

†Derating — Plastic DIP: – 10 mW/_C from 65_ to 125_C

SOIC Package: – 7 mW/_C from 65_ to 125_C

For high frequency or heavy load considerations, see Chapter 2 of the ON Semiconductor High−Speed CMOS Data Book (DL129/D).

RECOMMENDED OPERATING CONDITIONS

Symbol

Parameter

Min

Max

Unit

VCC

DC Supply Voltage (Referenced to GND)

4.5

5.5

V

Vin, Vout

DC Input Voltage, Output Voltage (Referenced to GND)

0

VCC

V

TA

Operating Temperature, All Package Types

– 55

+ 125

_C

tr, tf

Input Rise and Fall Time (Figure 1)

0

500

ns

This device contains protection

circuitry to guard against damage

due to high static voltages or electric

fields. However, precautions must

be taken to avoid applications of any

voltage higher than maximum rated

voltages to this high−impedance cir-

cuit. For proper operation, Vin and

Vout should be constrained to the

range GND v (Vin or Vout) v VCC.

Unused inputs must always be

tied to an appropriate logic voltage

level (e.g., either GND or VCC).

Unused outputs must be left open.

Số phần tương tự - MC74HCT273ADWR2

nhà sản xuất	tên linh kiện	bảng dữ liệu	Giải thích chi tiết về linh kiện
ON Semiconductor	MC74HCT273ADWR2	152Kb / 8P	Octal D Flip-Flop with Common Clock and Reset with LSTTL-Compatible Inputs March, 2000 ??Rev. 8
	MC74HCT273ADWR2G	141Kb / 7P	Octal D Flip-Flop with Common Clock and Reset with LSTTL-Compatible Inputs May, 2011 ??Rev. 11
	MC74HCT273ADWR2G	118Kb / 6P	Octal D Flip-Flop with Common Clock and Reset with LSTTL-Compatible Inputs September, 2014 ??Rev. 12

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Mô tả tương tự - MC74HCT273ADWR2

nhà sản xuất	tên linh kiện	bảng dữ liệu	Giải thích chi tiết về linh kiện
ON Semiconductor	MC74HCT574A	107Kb / 7P	Octal 3?뭆tate Noninverting D Flip?묯lop with LSTTL?묬ompatible Inputs September, 2005 ??Rev. 9
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Motorola, Inc	MC74HCT273A	131Kb / 5P	Octal D Flip-Flop with Common Clock and Reset with LSTTL-Compatible Inputs
ON Semiconductor	MC74HCT273A	141Kb / 7P	Octal D Flip-Flop with Common Clock and Reset with LSTTL-Compatible Inputs May, 2011 ??Rev. 11
	MC74HCT273A	118Kb / 6P	Octal D Flip-Flop with Common Clock and Reset with LSTTL-Compatible Inputs September, 2014 ??Rev. 12
	MC74HCT273A	152Kb / 8P	Octal D Flip-Flop with Common Clock and Reset with LSTTL-Compatible Inputs March, 2000 ??Rev. 8
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