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MC100ELT21DTG bảng dữ liệu(PDF) 2 Page - ON Semiconductor |
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2 / 8 page MC10ELT21, MC100ELT21 http://onsemi.com 2 1 2 3 45 6 7 8 Q0 GND VCC D0 NC D0 VBB NC PECL TTL Figure 1. 8−Lead Pinout and Logic Diagram (Top View) Table 1. PIN DESCRIPTION Pin Function Q0 TTL Outputs D0, DO PECL Differential Outputs VBB Reference Voltage Output VCC Positive Supply GND Ground NC No Connect EP Exposed pad must be connected to a sufficient thermal conduit. Electrically connect to the most negative supply or leave floating open. Table 2. ATTRIBUTES Characteristics Value Internal Input Pulldown Resistor 50 kW Internal Input Pullup Resistor N/A ESD Protection Human Body Model > 2 kV Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1) Pb Pkg Pb−Free Pkg SOIC−8 TSSOP−8 DFN8 Level 1 Level 1 Level 1 Level 1 Level 3 Level 1 Flammability Rating Oxygen Index: 28 to 34 UL 94 V−0 @ 0.125 in Transistor Count 81 Devices Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test 1. For additional information, see Application Note AND8003/D. Table 3. MAXIMUM RATINGS Symbol Parameter Condition 1 Condition 2 Rating Unit VCC PECL Power Supply GND = 0 V 7 V VIN PECL Input Voltage GND = 0 V VI VCC 0 to 6 V IBB VBB Sink/Source ± 0.5 mA TA Operating Temperature Range −40 to +85 °C Tstg Storage Temperature Range −65 to +150 °C qJA Thermal Resistance (Junction−to−Ambient) 0 lfpm 500 lfpm SOIC−8 SOIC−8 190 130 °C/W °C/W qJC Thermal Resistance (Junction−to−Case) Standard Board SOIC−8 41 to 44 °C/W qJA Thermal Resistance (Junction−to−Ambient) 0 lfpm 500 lfpm TSSOP−8 TSSOP−8 185 140 °C/W °C/W qJA Thermal Resistance (Junction−to−Ambient) 0 lfpm 500 lfpm DFN8 DFN8 129 84 °C/W °C/W Tsol Wave Solder Pb Pb−Free <2 to 3 sec @ 248°C <2 to 3 sec @ 260°C 265 265 °C Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. |
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