MC10E197

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9

Analysis of this portion of the filter circuit yields the transfer

function:

1

s

*

(s + z)

o2

The gain constant is defined as:

where:

eqt. 5

The integrator circuit introduces a zero, a pole at the origin,

and a second order pole set as described by the two pole model

for an op-amp. As in the case of the differential summing

amplifier, we assume the op-amp pole pair occur as a complex

conjugate pair making an angle of 45° to the real axis of the

complex frequency plane; are positioned for near unity gain

operation; and are located beyond the crossover frequency.

Since both the summing and integrating op-amps are realized

by the same type of op-amp (MC34182D), the open loop pole

positions for both amplifiers will be the same.

Further, the loop transfer function contains two poles located

at the origin, one introduced by the integrator and the other by

the VCO; hence a zero is necessary to compensate for the phase

shift produced by these poles and ensure loop stability. The

op-amp will be stable if the crossover point occurs before the

transfer function phase angle becomes 180°. The zero should

be positioned much less than one decade before the unity gain

frequency.

As in the case of the filter input circuitry, the poles and zero

from this analysis will be used as open loop poles and a zero

when performing the root locus analysis for the complete

system.

Determination of Element Values

The location of the zero is used to determine the element

values for the augmenting integrator. The value of the

when the loop is not sampling data. A value of 0.1 μF is

sufficient for most applications; this value may be increased

when the RDCLK frequency is much lower than 4 MHz. The

⎥ z⎥ =

1

eqt. 6

For unity gain operation of the integrating op-amp the value of

RlA is selected such that:

eqt. 7

It should be noted that although the zero can be tuned by

Voltage Divider

section must be attenuated to meet the VCOIN constraints. A

simple voltage divider network provides the necessary

attenuation (Figure 8).

Figure 8. Voltage Divider Subsection

In addition, a shunt filter capacitor connected between the

subsection with a single time constant transfer function that adds

a pole to the overall loop filter. The transfer function for the

voltage divider network is:

1

1

eqt. 9

eqt. 10

The pole for the voltage divider network should be positioned

an octave beyond that for the filter input.

Determination of Element Values

the resistor values for the voltage divider network are

determined using the design guidelines mentioned above and

from the following relationship:

=

Having determined the resistor values, the filter capacitor is

calculated by rearranging Equation 9:

1

eqt. 9a

Finally, a bias diode is included in the voltage divider network

to provide temperature compensation. The finite resistance of

this diode is neglected for these calculations.