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74LV125A bảng dữ liệu(PDF) 1 Page - Texas Instruments

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74LV125A bảng dữ liệu(HTML) 1 Page - Texas Instruments

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SN54LV125A, SN74LV125A
QUADRUPLE BUS BUFFER GATES
WITH 3STATE OUTPUTS
SCES124L − DECEMBER 1997 − REVISED APRIL 2005
1
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
D 2-V to 5.5-V VCC Operation
D Max tpd of 6 ns at 5 V
D Typical VOLP (Output Ground Bounce)
<0.8 V at VCC = 3.3 V, TA = 25°C
D Typical VOHV (Output VOH Undershoot)
>2.3 V at VCC = 3.3 V, TA = 25°C
D Support Mixed-Mode Voltage Operation on
All Ports
D Ioff Supports Partial-Power-Down Mode
Operation
D Latch-Up Performance Exceeds 250 mA Per
JESD 17
D ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
− 1000-V Charged-Device Model (C101)
1
2
3
4
5
6
7
14
13
12
11
10
9
8
1OE
1A
1Y
2OE
2A
2Y
GND
VCC
4OE
4A
4Y
3OE
3A
3Y
SN54LV125A ...J OR W PACKAGE
SN74LV125A . . . D, DB, DGV, N, NS,
OR PW PACKAGE
(TOP VIEW)
32 1 20 19
910 11 1213
4
5
6
7
8
18
17
16
15
14
4A
NC
4Y
NC
3OE
1Y
NC
2OE
NC
2A
SN54LV125A . . . FK PACKAGE
(TOP VIEW)
NC − No internal connection
SN74LV125A . . . RGY PACKAGE
(TOP VIEW)
114
78
2
3
4
5
6
13
12
11
10
9
4OE
4A
4Y
3OE
3A
1A
1Y
2OE
2A
2Y
description/ordering information
The ‘LV125A quadruple bus buffer gates are designed for 2-V to 5.5-V VCC operation.
These devices feature independent line drivers with 3-state outputs. Each output is disabled when the
associated output-enable (OE) input is high.
ORDERING INFORMATION
TA
PACKAGE†
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
PDIP − N
Tube of 25
SN74LV125AN
SN74LV125AN
QFN − RGY
Reel of 1000
SN74LV125ARGYR
LV125A
SOIC − D
Tube of 50
SN74LV125AD
LV125A
SOIC − D
Reel of 2500
SN74LV125ADR
LV125A
−40
°C to 85°C
SOP − NS
Reel of 2000
SN74LV125ANSR
74LV125A
−40
°C to 85°C
SSOP − DB
Reel of 2000
SN74LV125ADBR
LV125A
Tube of 90
SN74LV125APW
TSSOP − PW
Reel of 2000
SN74LV125APWR
LV125A
TSSOP − PW
Reel of 250
SN74LV125APWT
LV125A
TVSOP − DGV
Reel of 2000
SN74LV125ADGVR
LV125A
CDIP − J
Tube of 25
SNJ54LV125AJ
SNJ54LV125AJ
−55
°C to 125°C
CFP − W
Tube of 150
SNJ54LV125AW
SNJ54LV125AW
−55 C to 125 C
LCCC − FK
Tube of 55
SNJ54LV125AFK
SNJ54LV125AFK
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design
guidelines are available at www.ti.com/sc/package.
Copyright
 2005, Texas Instruments Incorporated
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.


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