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STA323W bảng dữ liệu(PDF) 7 Page - STMicroelectronics |
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STA323W bảng dữ liệu(HTML) 7 Page - STMicroelectronics |
7 / 71 page STA323W Description 7/71 Figure 2. Channel signal flow diagram through the digital core 1.2 EQ processing Two channels of input data (re-sampled if necessary) at 96 kHz are provided to the EQ processing block. In these blocks, up to four user-defined Biquads can be applied to each of the two channels. Pre-scaling, DC-blocking high-pass, de-emphasis, bass, and tone control filters can also be implemented by means of configuration parameter settings. The entire EQ block can be bypassed for all channels simultaneously by setting the DSPB bit to '1'. The CxEQBP bits can also be used to bypass the EQ functionality on a per channel basis. Figure 3 shows the internal signal flow through the EQ block. Figure 3. Channel signal flow diagram through the EQ block Channel mapping Re-sampling ED processing I2S input Mix DDX Crossover filter Volume limiter 4x Interp DDX output pre-scale High pass BQ#1 Re-sampled input Treble Bass filter To mix filter BQ#2 BQ#3 BQ#4 De- emphasis filter If CxTCB = 0 BTC: bass boost/cut TTC: treble boost/cut If DEMP = 1 4 biquads User defined if AMEQ = 00 Perset EQ if AMEQ = 01 Auto loudness if AMEQ = 10 If HPB= 0 If DSPB = 0 and CxEQB = 0 |
Số phần tương tự - STA323W |
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Mô tả tương tự - STA323W |
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