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MYSON
TECHNOLOGY
MTV112A
(Rev 1.9)
MTV112A Revision 1.9 05/18/2001
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4.4 H/V Polarity Detection
The polarity functions detect the input HSYNC/VSYNC high and low pulse duty cycle. If the high pulse
duration is longer than that of the low pulse, the negative polarity is asserted; otherwise, positive polarity is
asserted. The HPLchg interrupt is set when the Hpol value changes. The VPLchg interrupt is set when the
Vpol value changes.
4.5 Output HBLANK/VBLANK Control and Polarity Adjustment
The HBLANK is the mux output of HSYNC and self-test horizontal pattern. The VBLANK is the mux output of
VSYNC, CVSYNC and the self-test vertical pattern. The mux selection and output polarity are S/W
controllable. The VBLANK output is cut off when VSYNC frequency is over 200Hz or 133Hz depends on
8MHz/12MHz OSC selection. The HBLANK/VBLANK shares the output pin with P4.1/ P4.0.
4.6 Self-Test Pattern Generator
This generator can generate 4 display patterns for testing purposes: positive cross-hatch, negative cross-
hatch, full white, and full black (shown in the following figure). It was originally designed to support the
monitor manufacturer in performing a burn-in test, or to offer the end-user a reference to check the monitor.
The generator's output STOUT shares the output pin with P4.2.
Display Region
Positive Cross-Hatch
Negative Cross-Hatch
Full White
Full Black
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