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MC141627FT bảng dữ liệu(PDF) 9 Page - Motorola, Inc

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MC141627
9
MOTOROLA
APPLICATION DESIGN CONSIDERATIONS
VCC, GND
To minimize noise effects for A/D, D/A, and all digital VCC
and GND, wire up to the power supply separation. Leave the
GND line as wide and short as possible. Furthermore, the
wiring impedance should be as small as possible on the lay-
out. To bypass noise, apply a high–capacity, high–perfor-
mance frequency capacitor as close as possible to both
analog and digital VCC and ground pins.
A 0.1
µF multi–layer ceramic capacitor and a 47 µF tanta-
lum capacitor are recommended.
Vin
In order to prevent flyback noise of the video input, it is
necessary to keep the bandwidth to less than one half the
clock frequency by using an area filter. Here the amplifier
used as an input buffer needs a wide bandwidth and driving
capability. Moreover, to minimize external noise effects, an
input buffer should be driven by low impedance, and the Vin
pin should be laid out as close as possible to the pattern lay-
out.
When using the built–in clamp circuit, connect CLout with
Vin and input signals after ac coupling by using a high–
performance capacitor. In this case, keep the Vin, CLout, cou-
pling capacitor, and buffer–amplifier wiring as short as
possible. Pay particular attention to external noise and para-
sitic impedance.
A/D Reference Pin
The RTP and RBT pins provide a self–bias function that
internally generates VTP = 2.5 V and VBT = 0.5 V. Presetting
the A/D converter analog input dynamic range. A stable per-
formance is achieved by installing high–performance, high–
frequency capacitance as close as possible to the RTP and
RBT pins and bypassing to GND(AD).
A 0.1
µF multi–layer ceramic capacitor and a 10 µF tanta-
lum capacitor are recommended.
CLC
The CLC pin sets the clamp circuit speed with an external
capacitor and resistor.
Generally, the capacitor and resistor are arranged in a row
and connected with GND(AD). Select a capacitor that mini-
mizes the dielectric absorbing error. When the capacitor
capacity is reduced, the shift speed of the VCR signal to
VCC(AD) side is accelerated. When the resistor value is
reduced, the shift speed of the VCR signal to GND(AD) is ac-
celerated. If the resistor value is too small at this point, sag-
ging will appear in the VCR signal. Also, if the capacitor’s
capacity is too large, the clamp speed will slow down; there-
fore, it is very important to adjust the values of the resistor
and capacitance to match the application.
D/A Reference
REF(DA) is a D/A converter reference decoupling pin for
both the Yout and Cout. Bypass to GND(DA) by applying a
high–performance frequency capacitor as close to the pin as
possible.
A 0.1
µF multi–ceramic capacitor is recommended.
Clock Input
The clock frequency inputs 3.58 MHz/4.43 MHz during nor-
mal (FSC) mode, and 14.31818 MHz/17.734475 MHz during
the other modes. The minimum input level is 1.0 V p–p. It
should be phase–locked to the subcarrier of the video signal.
The clock line should be wired with the shortest wire and
be separated from other circuits to minimize cross coupling
to other signals. The CLK(AD) pin is used only during digital
input comb filtering mode; therefore, it should be in GND
level except when the digital input comb filtering mode is se-
lected.
Ibias
The Ibias pin is used to set up the bias current for the A/D
and D/A converters. Connect an external resistor between
the Ibias and GND(DA).
Digital Input Comb Filtering Mode
Connect CLK(AD) with the GND(D) when the A/D convert-
er is not being used. Connect D0 – D7 with GND(D), when
the D/A converter and filter are not being used. This is to
eliminate any unnecessary operation of blocks which are not
being used. At this point, make sure voltage is supplied to the
VCC(AD), VCC(DA), and VCC(D). This eliminates latch–up
during operating.
Latch–Up
The VCC(AD), VCC(DA), and VCC(D) pins are power
supplies, independent from each other. Therefore, latch–up
may occur when the power supply is turned on. To eliminate
latch–up, turn on each power supply [VCC(AD), VCC(DA), and
VCC(D) pins] simultaneously.


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