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ADG1233YRUZ bảng dữ liệu(PDF) 9 Page - Analog Devices

tên linh kiện ADG1233YRUZ
Giải thích chi tiết về linh kiện  Low Capacitance, Triple/Quad SPDT -15 V/12 V i CMOS Switches
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ADG1233/ADG1234
Rev. A | Page 9 of 16
TERMINOLOGY
VDD
Most positive supply potential.
VSS
Most negative power supply potential in dual supplies. In
single-supply applications, it can be connected to ground.
GND
Ground (0 V) reference.
RON
Ohmic resistance between D and S.
ΔRON
Difference between the RON of any two channels.
IS (Off)
Source leakage current when switch is off.
ID (Off)
Drain leakage current when switch is off.
ID, IS (On)
Channel leakage current when switch is on.
VD, VS
Analog voltage on Terminal D, Terminal S.
CS (Off)
Channel input capacitance for off condition.
CD (Off)
Channel output capacitance for off condition.
CD, CS (On)
On switch capacitance.
CIN
Digital input capacitance.
tON (EN)
Delay time between the 50% and 90% points of the digital input
and switch on condition.
tOFF (EN)
Delay time between the 50% and 90% points of the digital input
and switch off condition.
tTRANSITION
Delay time between the 50% and 90% points of the digital
inputs and the switch on condition when switching from one
address state to another.
tBBM
Off time measured between the 80% point of both switches
when switching from one address state to another.
VINL
Maximum input voltage for Logic 0.
VINH
Minimum input voltage for Logic 1.
IINL, IINH
Input current of the digital input.
IDD
Positive supply current.
ISS
Negative supply current.
Off Isolation
A measure of an unwanted signal coupling through an off channel.
Charge Injection
A measure of the glitch impulse transferred from the digital
input to the analog output during switching.
Bandwidth
Frequency at which the output is attenuated by 3 dB.
On Response
Frequency response of the on switch.
THD + N
Ratio of the harmonic amplitude plus noise of the signal to the
fundamental.


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