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AD9992BBCZ bảng dữ liệu(PDF) 8 Page - Analog Devices

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AD9992
Rev. C | Page 8 of 92
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
AD9992
TOP VIEW
(Not to Scale)
1234
56789 10 11
A
B
C
D
E
F
G
H
J
K
L
A1 CORNER
INDEX AREA
Figure 3. Pin Configuration
Table 7. Pin Function Descriptions
Pin No.
Mnemonic
Type1
Description
A1
GPO8
DIO
General-Purpose Output 8
B2
GPO7
DIO
General-Purpose Output 7
C2
GPO6
DIO
General-Purpose Output 6
B1
GPO5
DIO
General-Purpose Output 5
B4
GPO4
DIO
General-Purpose Output 4
C1
GPO3
DIO
General-Purpose Output 3
D2
GPO2
DIO
General-Purpose Output 2
C3
GPO1
DIO
General-Purpose Output 1
D3
SYNC
DI
External System Sync Input
E2
VD
DIO
Vertical Sync Pulse (input for slave mode, output for master mode)
D1
HD
DIO
Horizontal Sync Pulse (input for slave mode, output for master mode)
E7
RSTB
DI
External Reset Input (active low pulse to reset, internal pull-up resistor)
E6
IOVDD
P
Digital I/O Supply: 1.8 V, 3.0 V (GPO, SUBCK, HD/VD, SL, SCK, SDATA, SYNC, RSTB)
E5
IOVSS
P
Digital I/O Ground
E3
XVVDD
P
XV Output Supply: 1.8 V, 3.0 V
E1
XSUBCK
DO
CCD Substrate Clock
F2
XV1
DO
CCD Vertical Clock 1
F3
XV2
DO
CCD Vertical Clock 2
F7
XV3
DO
CCD Vertical Clock 3
G3
XV4
DO
CCD Vertical Clock 4
F5
XV5
DO
CCD Vertical Clock 5
F6
XV6
DO
CCD Vertical Clock 6
G2
XV7
DO
CCD Vertical Clock 7
F1
XV8
DO
CCD Vertical Clock 8
G1
XV9
DO
CCD Vertical Clock 9
G5
XV10
DO
CCD Vertical Clock 10
H2
XV11
DO
CCD Vertical Clock 11
H1
XV12
DO
CCD Vertical Clock 12
G6
XV13
DO
CCD Vertical Clock 13
G7
XV14
DO
CCD Vertical Clock 14
J2
XV15
DO
CCD Vertical Clock 15
J1
XV16
DO
CCD Vertical Clock 16
L1
XV17
DO
CCD Vertical Clock 17
L2
XV18
DO
CCD Vertical Clock 18


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