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MC33762 bảng dữ liệu(PDF) 9 Page - ON Semiconductor |
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MC33762 bảng dữ liệu(HTML) 9 Page - ON Semiconductor |
9 / 16 page MC33762 http://onsemi.com 9 Understanding the Load Transient Improvement The MC33762 features a novel architecture which allows the user to easily implement the regulator in burst systems where the time between two current shots is kept very small. The quality of the transient response time is related to many parameters, among which the closed−loop bandwidth with the corresponding phase margin plays an important role. However, other characteristics also come into play like the series pass transistor saturation. When a current perturbation suddenly appears on the output, e.g. a load increase, the error amplifier reacts and actively biases the PNP transistor. During this reaction time, the LDO is in open−loop and the output impedance is rather high. As a result, the voltage brutally drops until the error amplifier effectively closes the loop and corrects the output error. When the load disappears, the opposite phenomenon takes place with a positive overshoot. The problem appears when this overshoot decays down to the LDO steady−state value. During this decreasing phase, the LDO stops the PNP bias and one can consider the LDO asleep (Figure 8). If by misfortune a current shot appears, the reaction time is incredibly lengthened and a strong undershoot takes place. This reaction is clearly not acceptable for line sensitive devices, such as VCOs or other Radio−Frequency parts. This problem is dramatically exacerbated when the output current drops to zero rather than a few mA. In this later case, the internal feedback network is the only discharge path, accordingly lengthening the output voltage decay period (Figure 9). The MC33762 cures this problem by implementing a clever design where the LDO detects the presence of the overshoot and forces the system to go back to steady−state as soon as possible, ready for the next shot. Figure 10 and 11 show how it positively improves the response time and decreases the negative peak voltage. Figure 8. A Standard LDO Behavior when the Load Current Disappears Figure 9. A Standard LDO Behavior when the Load Current Appears in the Decay Zone Figure 10. Without Load Transient Improvement Figure 11. MC33762 with Load Transient Improvement |
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