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LMX2330UTMX bảng dữ liệu(PDF) 3 Page - National Semiconductor (TI) |
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LMX2330UTMX bảng dữ liệu(HTML) 3 Page - National Semiconductor (TI) |
3 / 42 page Connection Diagrams Chip Scale Package (SLB) (Top View) Thin Shrink Small Outline Package (TM) (Top View) 10136639 10136602 Pin Descriptions Pin Name Pin No. 24-Pin CSP Pin No. 20-Pin TSSOP I/O Description V CC 24 1 — Power supply bias for the RF PLL analog and digital circuits. V CC may range from 2.7V to 5.5V. Bypass capacitors should be placed as close as possible to this pin and be connected directly to the ground plane. V P RF 2 2 — RF PLL charge pump power supply. Must be ≥ V CC. D o RF 3 3 O RF PLL charge pump output. The output is connected to the external loop filter, which drives the input of the VCO. GND 4 4 — Ground for the RF PLL digital circuitry. f IN RF 5 5 I RF PLL prescaler input. Small signal input from the VCO. f IN RF 6 6 I RF PLL prescaler complementary input. For single ended operation, this pin should be AC grounded. The LMX233xU RF PLL can be driven differentially when the bypass capacitor is omitted. GND 7 7 — Ground for the RF PLL analog circuitry. OSC in 8 8 I Reference oscillator input. The input has an approximate V CC/2 threshold and can be driven from an external CMOS or TTL logic gate. GND 10 9 — Ground for the IF PLL digital circuits, MICROWIRE™,F oLD, and oscillator circuits. F oLD 11 10 O Programmable multiplexed output pin. Functions as a general purpose CMOS TRI-STATE output, RF/IF PLL push-pull analog lock detect output, N and R divider output or Fastlock output, which connects a parallel resistor to the external loop filter. Clock 12 11 I MICROWIRE Clock input. High impedance CMOS input. Data is clocked into the 22-bit shift register on the rising edge of Clock. Data 14 12 I MICROWIRE Data input. High impedance CMOS input. Binary serial data. The MSB of Data is shifted in first. The last two bits are the control bits. LE 15 13 I MICROWIRE Latch Enable input. High impedance CMOS input. When LE transitions HIGH, Data stored in the shift register is loaded into one of 4 internal control registers. GND 16 14 — Ground for the IF PLL analog circuitry. www.national.com 3 |
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