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STR755FR0T6 bảng dữ liệu(PDF) 1 Page - STMicroelectronics |
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1 / 73 page October 2006 Rev 2 1/71 1 STR750F ARM7TDMI-S™ 32-bit MCU with Flash, SMI, 3 std 16-bit timers, PWM timer, fast 10-bit ADC, I2C, UART, SSP, USB and CAN ■ Core – ARM7TDMI-S 32-bit RISC CPU – 54 DMIPS @ 60 MHz ■ Memories – Up to 256 KB Flash program memory (10k erase/write cycles, retention 20 yrs at 85°C) – 16KB Read-While-Write Flash for data (100k erase/write cycles, retention 20 yrs@ 85°C) – Flash Data Readout and Write Protection – 16KBytes embedded high speed SRAM – Memory mapped interface (SMI) to ext. Serial Flash (64 MB) w. boot capability ■ Clock, Reset and Supply Management – Single supply 3.3V ±10% or 5V ±10% – Embedded 1.8V Voltage Regulators with Low Power features – Smart Clock Controller with flexible clock generation capability: – Internal RC for fast start-up and backup clock mechanism – Up to 60 MHz operation using internal PLL with 4 or 8 MHz crystal/ceramic osc. – Smart Low Power Modes: SLOW, WFI, STOP and STANDBY with backup registers – Real Time Clock, driven by low power internal RC or 32.768 kHz dedicated osc, for clock-calendar and Auto Wake-up ■ Nested interrupt controller – Fast interrupt handling with 32 vectors – 16 IRQ priorities, 2 maskable FIQ sources – 16 external interrupt / wake-up Lines ■ DMA – 4-channel DMA controller – Circular buffer management – Support for UART, SSP, Timers, ADC ■ 6 Timers – 16-bit watchdog timer (WDG) – 16-bit timer for system timebase functions – 3 synchronizable timers each with up to 2 input captures and 2 output compare/PWMs. – 16-bit 6-channel synchronizable PWM timer – Dead time generation, edge/center-aligned waveforms and emergency stop – Ideal for induction/brushless DC motors ■ 8 Communications Interfaces –1 I2C interface – 3 HiSpeed UARTs w. Modem/LIN capability – 2 SSP interfaces (SPI or SSI) up to 16 Mb/s – 1 CAN interface (2.0B Active) – 1 USB full-speed 12 Mb/s interface with 8 configurable endpoint sizes ■ 10-bit A/D Converter – 16/11 chan. with prog. Scan Mode & FIFO – Programmable Analog Watchdog feature – Conversion: min. 3.75 µs, range: 0 to VDD_IO – Start conversion can be triggered by timers ■ Up to 72/38 I/O ports – 72/38 GPIO lines with High Sink capabilities – Atomic bit SET and RES operations LQFP64 10x10 mm LQFP100 14 x 14 mm LFBGA64 8 x 8 x 1.7 mm LFBGA100 10 x 10 x 1.7 mm www.st.com |
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