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N316AD bảng dữ liệu(PDF) 5 Page - Fairchild Semiconductor

tên linh kiện N316AD
Giải thích chi tiết về linh kiện  N-Channel Logic Level PWM Optimized UltraFET Trench Power MOSFETs
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N316AD bảng dữ liệu(HTML) 5 Page - Fairchild Semiconductor

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©2002 Fairchild Semiconductor Corporation
Rev. B, February 2002
Figure 11. Capacitance vs Drain to Source
Voltage
Figure 12. Gate Charge Waveforms for Constant
Gate Currents
Figure 13. Switching Time vs Gate Resistance
Figure 14. Switching Time vs Gate Resistance
Typical Characteristic (Continued)
2000
VDS, DRAIN TO SOURCE VOLTAGE (V)
100
1000
0.1
1
10
CISS = CGS + CGD
COSS ≅ CDS + CGD
CRSS = CGD
VGS = 0V, f = 1MHz
30
0
2
4
6
8
10
0
102030
Qg, GATE CHARGE (nC)
VDD = 15V
ID = 28A
ID = 10A
WAVEFORMS IN
DESCENDING ORDER:
0
50
100
150
0
1020
304050
RGS, GATE TO SOURCE RESISTANCE (Ω)
VGS = 4.5V, VDD = 15V, ID = 10A
tr
td(ON)
td(OFF)
tf
0
50
100
150
0
1020
304050
RGS, GATE TO SOURCE RESISTANCE (Ω)
VGS = 10V, VDD = 15V, ID = 10A
td(OFF)
td(ON)
tf
tr
200
Test Circuits and Waveforms
Figure 15. Unclamped Energy Test Circuit
Figure 16. Unclamped Energy Waveforms
tP
VGS
0.01
Ω
L
IAS
+
-
VDS
VDD
RG
DUT
VARY tP TO OBTAIN
REQUIRED PEAK IAS
0V
VDD
VDS
BVDSS
tP
IAS
tAV
0


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