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ADG3123BRUZ bảng dữ liệu(PDF) 11 Page - Analog Devices |
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11 / 12 page ADG3123 Rev. A | Page 11 of 12 APPLICATIONS The high voltage operation coupled with high current driving capability and the wide range of CMOS levels accepted by the ADG3123, make the device ideal for LCD-TFT panel applica- tions. In this type of application, the controllers that generate the timing signals required to control the pixel scanning process inside the panel are usually low voltage CMOS devices. Most LCD-TFT panels operate at high supply voltages; therefore, the timing signals generated by the controller require level translation to drive the panel. Figure 18 shows a typical applica- tion circuit where the ADG3123 translates eight timing signals provided by the timing controller into high voltage logic levels required to drive the panel. 1 2 3 4 5 6 7 8 9 10 20 19 18 17 16 15 14 13 12 11 Y1 Y2 Y3 Y6 Y5 Y4 VDDB Y8 Y7 VDDA A1 A2 A3 A6 A5 A4 GND VSS A8 A7 ADG3123 LCD-TFT PANEL OUT1 OUT2 OUT3 OUT6 OUT5 OUT4 GND OUT8 OUT7 TIMING CONTROLLER VDD 10µF 10µF 0.1µF 0.1µF VDD = +2.3V TO +5.5V DC TO DC CONVERTER –5V TO –10V +25V TO +30V +25V TO +30V + + 10µF + 0.1µF NOTE: |VDDB| + |VSS| ≤ 35V and VDDA ≤ VDDB Figure 18. Typical Application Circuit |
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