MOTOROLA CMOS LOGIC DATA

1

MC14558B

BCD-to-Seven Segment

Decoder

The MC14558B decodes 4–bit binary coded decimal data dependent on

the state of auxiliary inputs, Enable and RBI, and provides an active–high

seven–segment output for a display driver.

An auxiliary input truth table is shown, in addition to the BCD to

seven–segment truth table, to indicate the functions available with the two

auxiliary inputs.

Leading Zero blanking is easily obtained with an external flip–flop in time

division multiplexed systems displaying most significant decade first.

• Supply Voltage Range = 3.0 Vdc to 18 Vdc

• Segment Blanking for All Illegal Input Combinations

• Lamp Test Function

• Capability for Suppression of Non–Significant Zeros

• Lamp Intensity Function

• Capable of Driving Two Low–power TTL Loads. One Low–power

Schottky TTL Load or Two HTL Loads Over the Rated Temperature

Range

Rating

Symbol

Value

Unit

DC Supply Voltage

VDD

– 0.5 to + 18

V

Input Voltage, All Inputs

Vin

– 0.5 to VDD + 0.5

V

DC Input Voltage, per Pin

Iin

± 10

mAdc

Operating Temperature Range

TA

– 55 to + 125

_C

Power Dissipation, per Package†

PD

500

mW

Storage Temperature Range

Tstg

– 65 to + 150

_C

* Maximum Ratings are those values beyond which damage to the device may occur.

†Temperature Derating:

Plastic “P and D/DW” Packages: – 7.0 mW/

_C From 65_C To 125_C

Ceramic “L” Packages: – 12 mW/

_C From 100_C To 125_C

AUXILIARY INPUT TRUTH TABLE

Enable

Pin 3

RBI

Pin 5

BCD

Input

Code

RBO

Pin 4

Function Performed

0

0

X

0

Lamp Test

0

1

X

1

Blank Segments

1

1

0

1

Display Zero

1

0

0

0

Blank Segments

1

X

1 – 9

1

1–9 Displayed

X = Don’t Care

RBI = Ripple Blanking Input

RBO = Ripple Blanking Output

MOTOROLA

SEMICONDUCTOR TECHNICAL DATA

REV 3

1/94

MC14558B

L SUFFIX

CERAMIC

CASE 620

ORDERING INFORMATION

MC14XXXBCP

Plastic

MC14XXXBCL

Ceramic

MC14XXXBD

SOIC

TA = – 55° to 125°C for all packages.

P SUFFIX

PLASTIC

CASE 648

D SUFFIX

SOIC

CASE 751B

PIN ASSIGNMENT

13

14

15

16

9

10

11

12

5

4

3

2

1

8

7

6

b

a

g

f

VDD

e

d

c

RBO

ENABLE

C

B

VSS

A

D

RBI

a

b

c

d

e

f

g

0

1

2

3

4

5

6

7

8

9

DISPLAY