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MC14531BCL bảng dữ liệu(PDF) 1 Page - Motorola, Inc |
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MC14531BCL bảng dữ liệu(HTML) 1 Page - Motorola, Inc |
1 / 5 page MOTOROLA CMOS LOGIC DATA 1 MC14531B 12-Bit Parity Tree The MC14531B 12–bit parity tree is constructed with MOS P–channel and N–channel enhancement mode devices in a single monolithic structure. The circuit consists of 12 data–bit inputs (D0 thru D11), and even or odd parity selection input (W) and an output (Q). The parity selection input can be considered as an additional bit. Words of less than 13 bits can generate an even or odd parity output if the remaining inputs are selected to contain an even or odd number of ones, respectively. Words of greater than 12–bits can be accommodated by cascading other MC14531B devices by using the W input. Applications include checking or including a redundant (parity) bit to a word for error detection/correction systems, controller for remote digital sensors or switches (digital event detection/correction), or as a multiple input summer without carries. • Supply Voltage Range = 3.0 Vdc to 18 Vdc • All Outputs Buffered • Capable of Driving Two Low–Power TTL Loads or One Low–Power Schottky TTL Load Over the Rated Temperature Range • Variable Word Length • Diode Protection on All Inputs MAXIMUM RATINGS* (Voltages Referenced to VSS) Symbol Parameter Value Unit VDD DC Supply Voltage – 0.5 to + 18.0 V Vin, Vout Input or Output Voltage (DC or Transient) – 0.5 to VDD + 0.5 V Iin, Iout Input or Output Current (DC or Transient), per Pin ± 10 mA PD Power Dissipation, per Package† 500 mW Tstg Storage Temperature – 65 to + 150 _C TL Lead Temperature (8–Second Soldering) 260 _C * Maximum Ratings are those values beyond which damage to the device may occur. †Temperature Derating: Plastic “P and D/DW” Packages: – 7.0 mW/ _C From 65_C To 125_C Ceramic “L” Packages: – 12 mW/ _C From 100_C To 125_C LOGIC DIAGRAM Q = D0 D1 D2 @@@@ D11 W VDD = PIN 16 VSS = PIN 8 D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 ODD/EVEN W 9 Q 7 6 5 4 3 2 1 15 14 13 12 11 10 MOTOROLA SEMICONDUCTOR TECHNICAL DATA © Motorola, Inc. 1995 REV 3 1/94 MC14531B L SUFFIX CERAMIC CASE 620 ORDERING INFORMATION MC14XXXBCP Plastic MC14XXXBCL Ceramic MC14XXXBD SOIC TA = – 55° to 125°C for all packages. P SUFFIX PLASTIC CASE 648 D SUFFIX SOIC CASE 751B TRUTH TABLE Inputs Output Decimal (Octal) W D11 D10 … D2 D1 D0 Equivalent Q* 0 0 0 … 0 0 0 0 (0) 0 0 0 0 … 0 0 1 1 (1) 1 0 0 0 … 0 1 0 2 (2) 1 0 0 0 … 0 1 1 3 (3) 0 0 0 0 … 1 0 0 4 (4) 1 0 0 0 … 1 0 1 5 (5) 0 0 0 0 … 1 1 0 6 (6) 0 0 0 0 … 1 1 1 7 (7) 1 * * * * * * * * * * * * … * * * * * * * * * * * * * * 1 1 1. … 0 0 0 8184 (17770) 0 1 1 1 … 0 0 1 8185 (17771) 1 1 1 1 … 0 1 0 8186 (17772) 1 1 1 1 … 0 1 1 8187 (17773) 0 1 1 1 … 1 0 0 8188 (17774) 1 1 1 1 … 1 0 1 8189 (17775) 0 1 1 1 … 1 1 0 8190 (17776) 0 1 1 1 … 1 1 1 8191 (17777) 1 *0 = Even Parity 1 = Odd Parity NOTE: May redefine to suit application by manipulating W and/or other available D’s. |
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