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74ALVT16821DGG bảng dữ liệu(PDF) 8 Page - NXP Semiconductors

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Giải thích chi tiết về linh kiện  20-bit bus-interface D-type flip-flop; positive-edge trigger 3-State
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74ALVT16821DGG bảng dữ liệu(HTML) 8 Page - NXP Semiconductors

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Philips Semiconductors
Product specification
74ALVT16821
2.5V/3.3V 20-bit bus-interface D-type flip-flop;
positive-edge trigger (3-State)
1998 Feb 13
8
AC CHARACTERISTICS (2.5V
"0.2V RANGE)
GND = 0V; tR = tF = 2.5ns; CL = 50pF; RL = 500Ω; Tamb = –40°C to +85°C.
LIMITS
SYMBOL
PARAMETER
WAVEFORM
Tamb = -40 to +85oC
VCC = +2.5V ±0.2V
UNIT
MIN
TYP
MAX
fMAX
Maximum clock frequency
1
150
MHz
tPLH
tPHL
Propagation delay
nCP to nQx
1
1.0
1.0
2.6
2.7
4.0
4.4
ns
tPZH
tPZL
Output enable time
to High and Low level
3
4
1.5
1.0
2.8
1.8
4.6
3.0
ns
tPHZ
tPLZ
Output disable time
from High and Low level
3
4
1.5
1.0
2.7
2.1
4.1
3.3
ns
NOTE:
1. All typical values are at VCC = 3.3V and Tamb = 25°C.
AC SETUP REQUIREMENTS (2.5V
"0.2V RANGE)
GND = 0V, tR = tF = 2.5ns, CL = 50pF, RL = 500Ω
LIMITS
SYMBOL
PARAMETER
WAVEFORM
Tamb = -40 to +85oC
VCC = +2.5 ±0.2V
UNIT
MIN
TYP
ts(H)
ts(L)
Setup time, High or Low
nDx to nCP
2
1.5
2.0
0.1
0.5
ns
th(H)
th(L)
Hold time, High or Low
nDx to nCP
2
0.3
0.5
–0.5
–0.1
ns
tw(H)
tw(L)
nCP pulse width
High or Low
1
1.5
1.5
ns
AC WAVEFORMS
VM = 1.5V at VCC w 3.0V; VM = VCC/2 at VCC v 2.7V
VX = VOL + 0.3V at VCC w 3.0V; VX = VOL + 0.15V at VCC v 2.7V
VY = VOH – 0.3V at VCC w 3.0V; VY = VOH – 0.15V at VCC v 2.7V
VM
SH00005
nCP
nQx
VM
tw(H)
tPHL
VM
tPLH
1/fMAX
VM
VM
tw(L)
0V
VOH
VOL
3.0V or VCC
whichever
is less
Waveform 1. Propagation Delay, Clock Input to Output,
Clock Pulse Width, and Maximum Clock frequency
th(H)
ts(H)
CP
SH00006
VM
VM
VM
VM
VM
VM
th(L)
ts(L)
nDx
0V
0V
3.0V or VCC
whichever
is less
3.0V or VCC
whichever
is less
Waveform 2. Data Setup and Hold Times


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   20-bit bus interface D-type flip-flop; positive-edge trigger; 3-state
Rev. 4 - 22 January 2018
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