Philips Semiconductors

Product specification

74ABT652A

Octal transceiver/register, non-inverting (3-State)

1995 Apr 19

2

LOGIC SYMBOL

23

CPBA

22

SBA

21

OEBA

CPAB

1

SAB

2

SA00095

B0

B1

B2

B3

B4

B5

B6

B7

20

19

18

17

16

15

14

13

4

5

6

7

8

9

10

11

A0

A1

A2

A3

A4

A5

A6

A7

3

OEAB

LOGIC SYMBOL (IEEE/IEC)

SA00096

21

3

23

22

1

2

4

5

6

7

8

9

10

11

EN1 [BA]

EN2 [AB]

C4

G7

C6

G5

20

19

18

17

16

15

14

13

w1

1

5

4D

5 1

w1

2

6D

7

1

7

FUNCTION TABLE

INPUTS

DATA I/O

OPERATING MODE

OEAB

OEBA

CPAB

CPBA

SAB

SBA

An

Bn

OPERATING MODE

L

L

H

H

H or L

↑

H or L

↑

X

X

X

X

Input

Input

Isolation

Store A and B data

X

H

H

H

↑

↑

H or L

↑

X

**

X

X

Input

Unspecified

output*

Store A, Hold B

Store A in both registers

L

L

X

L

H or L

↑

↑

↑

X

X

X

**

Unspecified

output*

Input

Hold A, Store B

Store B in both registers

L

L

L

L

X

X

X

H or L

X

X

L

H

Output

Input

Real time B data to A bus

Stored B data to A bus

H

H

H

H

X

H or L

X

X

L

H

X

X

Input

Output

Real time A data to B bus

Store A data to B bus

H

L

H or L

H or L

H

H

Output

Output

Stored A data to B bus

Stored B data to A bus

H = High voltage level

L

= Low voltage level

X = Don’t care

↑ = Low-to-High clock transition

*

The data output function may be enabled or disabled by various signals at the OEBA and OEAB inputs. Data input functions are always

enabled, i.e., data at the bus pins will be stored on every Low-to-High transition of the clock.

**

If both Select controls (SAB and SBA) are Low, then clocks can occur simultaneously. If either Select control is High, the clocks must be

staggered in order to load both registers.