Philips Semiconductors

Product specification

74ABT574A

Octal D-type flip-flop (3-State)

1995 May 22

3

LOGIC SYMBOL

11

1

CP

OE

234

56

789

D0

D1

D2

D3

D4

D5

D6

D7

19

18

17

16

15

14

13

12

Q0

Q1

Q2

Q3

Q4

Q5

Q6

Q7

SA00104

LOGIC SYMBOL (IEEE/IEC)

1

2

19

3

18

4

17

5

16

EN

11

C1

6

15

7

14

8

13

9

12

2D

1

SA00105

FUNCTION TABLE

INPUTS

INTERNAL

OUTPUTS

OPERATING

OE

CP

Dn

INTERNAL

REGISTER

Q0 – Q7

OPERATING

MODE

L

L

↑

↑

l

h

L

H

L

H

Load and read

register

L

↑

X

NC

NC

Hold

H

H

↑

↑

X

Dn

NC

Dn

Z

Z

Disable outputs

H = High voltage level

h

= High voltage level one set-up time prior to the Low–to–High

clock transition

L

= Low voltage level

l

= Low voltage level one set-up time prior to the Low–to–High

clock transition

NC= No change

X = Don’t care

Z = High impedance “off” state

↑ = Low-to-High clock transition

↑ = not a Low-to-High clock transition

LOGIC DIAGRAM

CP Q

D

D0

Q0

CP Q

D

D1

CP Q

D

D2

CP Q

D

D3

CP Q

D

D4

CP Q

D

D5

CP Q

D

D6

CP Q

D

D7

Q1

Q2

Q3

Q4

Q5

Q6

Q7

CP

OE

SA00106

2

3

45

67

8

9

11

1

19

18

17

16

15

14

13

12