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GS1574 bảng dữ liệu(PDF) 4 Page - Gennum Corporation

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Giải thích chi tiết về linh kiện  GS1574 HD-LINX -TM II Adaptive Cable Equalizer
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GS1574 Preliminary Data Sheet
Proprietary and Confidential
28854 - 2
December 2004
4 of 17
1.2 GS1574 Pin Descriptions
Table 1-1: GS1574 Pin Descriptions
Pin Number
Name
Timing
Type
Description
1, 4
VEE_A
Analog
Power
Most negative power supply for analog circuitry.
Connect to analog GND.
2, 3
SDI, SDI
Analog
Input
Serial digital differential input.
5, 6
AGC, AGC
Analog
External AGC capacitor.
Connect pin 5 and pin 6 together through a 1uF capacitor.
7
BYPASS
Not
Synchronous
Input
Forces the Equalizing and DC RESTORE stages into bypass mode
when HIGH. No equalization occurs in this mode.
8
MCLADJ
Analog
Input
Maximum cable length adjust.
Adjusts the approximate maximum amount of cable to be equalized
(from 0m to the maximum cable length). The output is muted (latched to
the last state) when the maximum cable length is achieved.
NOTE: MCLADJ is only recommended for data rates up to 360Mb/s.
9
VEE_D
Analog
Power
Most negative power supply for the digital circuitry and output buffer.
Connect to digital GND.
10, 11
SDO, SDO
Analog
Output
Equalized serial digital differential output.
12
VEE_D
Analog
Power
Most negative power supply for the digital circuitry and output buffer.
Connect to digital GND.
13
VCC_D
Analog
Power
Most positive power supply for the digital I/O pins of the device.
Connect to +3.3V DC.
14
MUTE
Not
Synchronous
Input
CONTROL SIGNAL INPUT
levels are LVCMOS/LVTTL compatible. (3.3V Tolerant)
When the MUTE pin is set HIGH by the application interface, the serial
digital output of the device will be forced to a steady state.
When the MUTE pin is set LOW, the serial digital output of the device
will be active.
15
NC
No Connect.
16
VCC_A
Analog
Power
Most positive power supply for the analog circuitry of the device.
Connect to +3.3V DC.
Center Pad
Power
Internally bonded to VEE_A.


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