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N02M0818L1AN-85I bảng dữ liệu(PDF) 2 Page - NanoAmp Solutions, Inc.

tên linh kiện N02M0818L1AN-85I
Giải thích chi tiết về linh kiện  2Mb Ultra-Low Power Asynchronous Medical CMOS SRAM 256Kx8 bit
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nhà sản xuất  NANOAMP [NanoAmp Solutions, Inc.]
Trang chủ  http://www.nanoamp.com
Logo NANOAMP - NanoAmp Solutions, Inc.

N02M0818L1AN-85I bảng dữ liệu(HTML) 2 Page - NanoAmp Solutions, Inc.

  N02M0818L1AN-85I Datasheet HTML 1Page - NanoAmp Solutions, Inc. N02M0818L1AN-85I Datasheet HTML 2Page - NanoAmp Solutions, Inc. N02M0818L1AN-85I Datasheet HTML 3Page - NanoAmp Solutions, Inc. N02M0818L1AN-85I Datasheet HTML 4Page - NanoAmp Solutions, Inc. N02M0818L1AN-85I Datasheet HTML 5Page - NanoAmp Solutions, Inc. N02M0818L1AN-85I Datasheet HTML 6Page - NanoAmp Solutions, Inc. N02M0818L1AN-85I Datasheet HTML 7Page - NanoAmp Solutions, Inc. N02M0818L1AN-85I Datasheet HTML 8Page - NanoAmp Solutions, Inc. N02M0818L1AN-85I Datasheet HTML 9Page - NanoAmp Solutions, Inc.  
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The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com.
Stock No. 23208-01 11/01/02
NanoAmp Solutions, Inc.
N02M0818L1A
Functional Block Diagram
Functional Description
CE1
CE2
WE
OE
I/O0 - I/O7
MODE
POWER
H
X
X
X
High Z
Standby1
1. When the device is in standby mode, control inputs (WE and OE), address inputs and data input/outputs are internally isolated
from any external influence and disabled from exerting any influence externally.
Standby
X
L
X
X
High Z
Standby1
Standby
LHL
X2
2. When WE is invoked, the OE input is internally disabled and has no effect on the circuit.
Data In
Write2
Active
LH
HL
Data Out
Read
Active
L
H
H
H
High Z
Active
Active
Capacitance1
1. These parameters are verified in device characterization and are not 100% tested
Item
Symbol
Test Condition
Min
Max
Unit
Input Capacitance
CIN
VIN = 0V, f = 1 MHz, TA = 25oC
8pF
I/O Capacitance
CI/O
VIN = 0V, f = 1 MHz, TA = 25oC
8pF
Control
Logic
Page
Decode
Logic
Address
Inputs
A4 - A17
Input/
Output
Mux
and
Buffers
I/O0 - I/O7
Address
Word
Decode
Logic
Address
Address
Inputs
A0 - A3
16K Page
x 16 word
x 8 bit
RAM
CE1
CE2
WE
OE
VCCQ(opt)


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