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MC9S12DT256MFU bảng dữ liệu(PDF) 11 Page - Freescale Semiconductor, Inc |
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MC9S12DT256MFU bảng dữ liệu(HTML) 11 Page - Freescale Semiconductor, Inc |
11 / 130 page MC9S12DT256 Device User Guide — V03.07 11 List of Figures Figure 0-1 Order Partnumber Example. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15 Figure 1-1 MC9S12DT256 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23 Figure 1-2 MC9S12DT256 Memory Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26 Figure 2-1 Pin Assignments in 112-pin LQFP. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .52 Figure 2-2 Pin Assignments in 80-pin QFP for MC9S12DJ256 . . . . . . . . . . . . . . . . . . . . . .53 Figure 2-3 PLL Loop Filter Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .57 Figure 2-4 Colpitts Oscillator Connections (PE7=1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .59 Figure 2-5 Pierce Oscillator Connections (PE7=0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .59 Figure 2-6 External Clock Connections (PE7=0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .60 Figure 3-1 Clock Connections. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .69 Figure 20-1 Recommended PCB Layout for 112LQFP Colpitts Oscillator . . . . . . . . . . . . . . .84 Figure 20-2 Recommended PCB Layout for 80QFP Colpitts Oscillator . . . . . . . . . . . . . . . . .85 Figure 20-3 Recommended PCB Layout for 112LQFP Pierce Oscillator . . . . . . . . . . . . . . . .86 Figure 20-4 Recommended PCB Layout for 80QFP Pierce Oscillator . . . . . . . . . . . . . . . . . .87 Figure A-1 ATD Accuracy Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102 Figure A-2 Typical Endurance vs Temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 107 Figure A-3 Basic PLL functional diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113 Figure A-4 Jitter Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115 Figure A-5 Maximum bus clock jitter approximation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 115 Figure A-6 SPI Master Timing (CPHA=0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 119 Figure A-7 SPI Master Timing (CPHA=1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120 Figure A-8 SPI Slave Timing (CPHA=0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 121 Figure A-9 SPI Slave Timing (CPHA=1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 122 Figure A-10 General External Bus Timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 124 Figure B-1 112-pin LQFP mechanical dimensions (case no. 987) . . . . . . . . . . . . . . . . . . 128 Figure B-2 80-pin QFP Mechanical Dimensions (case no. 841B) . . . . . . . . . . . . . . . . . . . 129 |
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