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ST7FLITE30F2M6 bảng dữ liệu(PDF) 7 Page - STMicroelectronics |
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7 / 167 page ST7LITE3 7/167 Note: For input with interrupt possibility “eix” defines the associated external interrupt vector which can be as- signed to one of the I/O pins using the EISR register. Each interrupt can be either weak pull-up or floating defined through option register OR. 12 PA6 /MCO/ ICCCLK/ BREAK I/O CT X ei1 X X Port A6 Main Clock Output or In Circuit Commu- nication Clock or External BREAK Caution: During normal operation this pin must be pulled- up, internally or ex- ternally (external pull-up of 10k manda- tory in noisy environment). This is to avoid entering ICC mode unexpectedly during a reset. In the application, even if the pin is configured as output, any re- set will put it back in input pull-up. 13 PA5 /ATPWM3/ ICCDATA I/O CT HS X X X Port A5 Auto-Reload Timer PWM3 or In Circuit Communication Data 14 PA4/ATPWM2 I/O CT HS X X X Port A4 Auto-Reload Timer PWM2 15 PA3/ATPWM1 I/O CT HS X ei0 X X Port A3 Auto-Reload Timer PWM1 16 PA2/ATPWM0 I/O CT HS X X X Port A2 Auto-Reload Timer PWM0 17 PA1/ATIC I/O CT HS X X X Port A1 Auto-Reload Timer Input Capture 18 PA0/LTIC I/O CT HS X X X X Port A0 Lite Timer Input Capture 19 OSC2 O Resonator oscillator inverter output 20 OSC1/CLKIN I Resonator oscillator inverter input or External clock input Pin No. Pin Name Level Port / Control Main Function (after reset) Alternate Function Input Output 1 |
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