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RM48L940 bảng dữ liệu(PDF) 51 Page - Texas Instruments |
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RM48L940 bảng dữ liệu(HTML) 51 Page - Texas Instruments |
51 / 174 page RM48L940, RM48L740, RM48L540 www.ti.com SPNS175C – APRIL 2012 – REVISED JUNE 2015 6 System Information and Electrical Specifications 6.1 Device Power Domains The device core logic is split up into multiple power domains in order to optimize the power for a given application use case. There are eight core power domains in total: PD1, PD2, PD3, PD4, PD5, RAM_PD1, RAM_PD2, and RAM_PD3. The actual contents of these power domains are indicated in Section 1.4. PD1 is an "always-ON" power domain, which cannot be turned off. Each of the other core power domains can be turned ON/OFF one time during device initialization as per the application requirement. Refer to the Power Management Module (PMM) chapter of RM48x Technical Reference Manual (SPNU503) for more details. NOTE The clocks to a module must be turned off before powering down the core domain that contains the module. NOTE The logic in the modules that are powered down lose power completely. Any access to modules that are powered down results in an abort being generated. When power is restored, the modules power up to their default states (after normal power up). No register or memory contents are preserved in the core domains that are turned off. Copyright © 2012–2015, Texas Instruments Incorporated System Information and Electrical Specifications 51 Submit Documentation Feedback |
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Mô tả tương tự - RM48L940_V01 |
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