LMK61E08 datasheet(25/54 Pages) TI

tên linh kiện	LMK61E08

Giải thích chi tiết về linh kiện	LMK61E08 Ultra-Low Jitter Programmable Oscillator With Internal EEPROM

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LMK61E08

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SNAS805 – JUNE 2020

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Programming (continued)

address to be incremented and a read will take place of the next SRAM address. Access to SRAM will

terminate at the end of current I2C transaction.

NOTE

It is possible to increment SRAM address incorrectly when 2 successive accesses are

made to R51.

8.5.7 Read EEPROM

The contents of the EEPROM can be read out, one word at a time, starting with that of the requested address.

Following details the programming sequence for an EEPROM read by address.

1. Write the EEPROM address in R51.

2. The EEPROM data located at the address specified in the step above can be obtained by reading R52 in the

same I2C transaction. Any additional access that is part of the same transaction will cause the EEPROM

address to be incremented and a read will take place of the next EEPROM address. Access to EEPROM will

terminate at the end of current I2C transaction.

NOTE

It is possible to increment EEPROM address incorrectly when 2 successive accesses are

made to R51.

Số phần tương tự - LMK61E08

nhà sản xuất	tên linh kiện	bảng dữ liệu	Giải thích chi tiết về linh kiện
Texas Instruments	LMK61E0-050M	980Kb / 22P	[Old version datasheet] High-Performance Ultra-Low Jitter Oscillator
	LMK61E0-050M	447Kb / 22P	[Old version datasheet] LMK61XX High-Performance Ultra-Low Jitter Oscillator
	LMK61E0-050M	463Kb / 22P	[Old version datasheet] High-Performance Ultra-Low Jitter Oscillator
	LMK61E0-050M00	980Kb / 22P	[Old version datasheet] High-Performance Ultra-Low Jitter Oscillator
	LMK61E0-050M00	463Kb / 22P	[Old version datasheet] High-Performance Ultra-Low Jitter Oscillator

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