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DRV8714-Q1 bảng dữ liệu(PDF) 95 Page - Texas Instruments

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Giải thích chi tiết về linh kiện  DRV871x-Q1 Automotive Multi-Channel Smart Half-Bridge Gate Drivers With Wide Common Mode Current Sense Amplifiers
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8.6.3.3.14 STC_CTRL3 Register (Address = 37h) [reset = 20h]
STC_CTRL3 is shown in Table 8-83.
Return to the Summary Table.
Control register to configure STC rise/fall time and Kp loop controller gain setting for half-bridges 5 and 6.
Table 8-83. STC_CTRL3 Register Field Descriptions
Bit
Field
Type
Reset
Description
7-4
T_RISE_FALL_56
R/W
0010b
Set switch-node V SH rise and fall time for half-bridge 5 and 6.
0000b = 0.35 us
0001b = 0.56 us
0010b = 0.77 us
0011b = 0.98 us
0100b = 1.33 us
0101b = 1.68 us
0110b = 2.03 us
0111b = 2.38 us
1000b = 2.87 us
1001b = 3.36 us
1010b = 3.99 us
1011b = 4.62 us
1100b = 5.46 us
1101b = 6.30 us
1110b = 7.98 us
1111b = 16.03 us
3-0
KP_SLEW_56
R/W
0000b
STC proportional controller gain setting for half-bridge 5 and 6.
0000b = Disabled
0001b = 1
0010b = 2
0011b = 3
0100b = 4
0101b = 5
0110b = 6
0111b = 7
1000b = 8
1001b = 9
1010b = 10
1011b = 11
1100b = 12
1101b = 13
1110b = 14
1111b = 15
8.6.3.3.15 STC_CTRL4 Register (Address = 38h) [reset = 20h]
STC_CTRL4 is shown in Table 8-84.
Return to the Summary Table.
Control register to configure STC rise/fall time and Kp loop controller gain setting for half-bridges 7 and 8.
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DRV8714-Q1, DRV8718-Q1
SLVSEA2 – AUGUST 2020
Copyright © 2020 Texas Instruments Incorporated
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