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BQ79600-Q1 bảng dữ liệu(PDF) 46 Page - Texas Instruments |
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BQ79600-Q1 bảng dữ liệu(HTML) 46 Page - Texas Instruments |
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46 / 71 page  7.5.18 Register: FAULT_PWR Address: 0x2103 B7 B6 B5 B4 B3 B2 B1 B0 RSVD CVDD_UV_DRST CVDD_OV DVDD_OV AVDDREF_OV AVAO_SW_FAIL 0 0 0 0 0 0 0 0 R R R R R R R R CVDD_UV_DRST Indicates CVDDUV fault caused DRST. Shutdown/power up event shall not trigger this fault. 0: no fault 1: fault CVDD_OV Indicates an over voltage fault on the CVDD pin 0: no fault 1: fault DVDD_OV Indicates an over voltage fault on the DVDD pin 0: no fault 1: fault AVDDREF_OV Indicates an over voltage fault on the AVDD_REF internal supply 0: no fault 1: fault AVAO_SW_FAIL Indicates a fault is detected on the AVAO_REF switch. 0: no fault 1: fault 7.5.19 Register: FAULT_COMM1 Address: 0x2104 B7 B6 B5 B4 B3 B2 B1 B0 RSVD FCOMM_DET FTONE_DET HB_FAIL HB_FAST UART_FRAME COMMCLR_DET STOP_DET 0 0 0 0 0 0 0 0 R R R R R R R R FCOMM_DET Indicates the fault status bit in comm frame is set by stack devices. At least a fault in stack devices happened. Only apply to non-bq79606 family 0: no fault 1: fault FTONE_DET Indicates the fault tone is detected, COM Port in sleep mode if work with non-bq79606 (Detection is monitoring the COML side if [DIR_SEL] = 0 and vice versa.) 0: no fault 1: fault HB_FAIL Indicates HB tone is NOT detected within tHB_PERIOD, not supported with BQ79606A-Q1 ( Detection is monitoring the COML side if [DIR_SEL] = 0 and vice versa.) 0: no fault, HB tone detected as expected 1: fault HB_FAST Indicates HB tone is detected within tHB_FAST (too frequent), not supported with BQ79606A-Q1 ( Detection is monitoring the COML side if [DIR_SEL] = 0 and vice versa.) This bit could also be set when [FTONE_DET]=1 depends on how soon the Fault Tone is detected from previous Heartbeat tone. 0: no fault 1: fault UART_FRAME Indicates a UART FAULT detected when receiving command or transmitting response frames Further detail of the fault information is available in the DEBUG_UART_FRAME register 0: no fault 1: fault COMMCLR_DET A UART/SPI communication clear signal is detected. This bit is set when Sleep2active ping is sent in UART mode. While in SPI mode, it is not set when sleep2active ping is sent. 0: no UART/SPI Comm Clear 1: UART/SPI Comm Clear detected STOP_DET Indicates and unexpected STOP condition is received. Apply to UART mode. This bit is set when Sleep2active ping is sent in ACTIVE. 0: no fault 1: fault BQ79600-Q1 SLUSDS1A – NOVEMBER 2019 – REVISED AUGUST 2020 www.ti.com 46 Submit Document Feedback Copyright © 2020 Texas Instruments Incorporated Product Folder Links: BQ79600-Q1 |
Số phần tương tự - BQ79600-Q1_V01 |
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Mô tả tương tự - BQ79600-Q1_V01 |
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