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BQ77904 bảng dữ liệu(PDF) 37 Page - Texas Instruments |
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BQ77904 bảng dữ liệu(HTML) 37 Page - Texas Instruments |
37 / 46 page 11 Layout 11.1 Layout Guidelines 1. Match SRN and SRP traces. 2. RIN filters, VDD, AVDD filters, and the CVDD capacitor should be placed close to the device pins. 3. Separate the device ground plane (low current ground) from the high current path. Filter capacitors should reference to the low current ground path or device Vss. 4. In a stack configuration, the RCTRD and RCTRC should be placed closer to the lower device CTRD and CTRC pins. 5. RGS should be placed near the FETs. 11.2 Layout Example VDD AVDD VC5 : : VC1 AVSS RC Filters AVSS VDD AVDD VC5 : : VC1 AVSS CHGU DSG DVSS CTRD CTRC DVSS AVSS RC Filters DVSS PACK+ PACK- High current Path Low current, local ground for each device Connect the device ground at šZ o}Á Œ oo [• oo - on each cell group Please filters close to IC pins Low current, local device ground. Separate from high power path Please CTRs resistors close to the lower device Connect the bottom device ground at BAT-. Using BAT- as the mutual point to connect high and low current path Please filters close to IC pins Connect AVSS and DVSS to device ground plane Figure 11-1. Layout Example www.ti.com BQ77904, BQ77905 SLUSCM3K – APRIL 2020 – REVISED JULY 2020 Copyright © 2020 Texas Instruments Incorporated Submit Document Feedback 37 Product Folder Links: BQ77904 BQ77905 |
Số phần tương tự - BQ77904_V04 |
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Mô tả tương tự - BQ77904_V04 |
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