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BQ21062 bảng dữ liệu(PDF) 48 Page - Texas Instruments |
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BQ21062 bảng dữ liệu(HTML) 48 Page - Texas Instruments |
48 / 69 page 9.5.1.24 ICCTRL2 Register (Address = 0x37) [reset = 0x40] ICCTRL2 is shown in Figure 9-39 and described in Table 9-31. Return to Summary Table. Figure 9-39. ICCTRL2 Register 7 6 5 4 3 2 1 0 PMID_REG_CTRL_2:0 GPO_PG RESERVED HWRESET_14 S_WD CHARGER_DIS ABLE R/W-3b010 R/W-1b0 R/W-2b00 R/W-1b0 R/W-1b0 Table 9-31. ICCTRL2 Register Field Descriptions Bit Field Type Reset Description 7-5 PMID_REG_CTRL_2:0 R/W 3b010 System (PMID) Regulation Voltage 3b000 = Battery Tracking 3b001 = 4.4 V 3b010 = 4.5 V 3b011 = 4.6 V 3b100 = 4.7 V 3b101 = 4.8 V 3b110 = 4.9 V 3b111 = Pass-Through (VIN) 4 GPO_PG R/W 1b0 /PG General Purpose Output State Control 1b0 = Pulled Down 1b1 = High Z 3-2 RESERVED R/W 2b00 Reserved 1 HWRESET_14S_WD R/W 1b0 Enable for 14-second I2C watchdog timer for HW Reset after VIN connection 1b0 = Timer disabled 1b1 = Device will perform HW reset if no I2C transaction is done within 14 s after VIN is present 0 CHARGER_DISABLE R/W 1b0 Charge Disable 1b0 = Charge enabled if /CE pin is low 1b1 = Charge disabled 9.5.1.25 TS_READ Register (Address = 0x40) [reset = 0x2] TS_Read is shown in Figure 9-40 and described in Table 9-32. Return to Summary Table. Figure 9-40. TS_READ Register 7 6 5 4 3 2 1 0 INTERVAL RESERVED GET_FAULT_ENABLE RESERVED RESERVED R/W-1b0 R-1b0 R/W-1b0 R/W-2b00 R/W-3b010 BQ21062 SLUSE42 – JULY 2020 www.ti.com 48 Submit Document Feedback Copyright © 2020 Texas Instruments Incorporated Product Folder Links: BQ21062 |
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