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ITS4075Q-EP-D bảng dữ liệu(PDF) 14 Page - Infineon Technologies AG |
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ITS4075Q-EP-D bảng dữ liệu(HTML) 14 Page - Infineon Technologies AG |
14 / 42 page Data Sheet 14 Rev. 1.01 2018-06-14 ITS4075Q-EP-D 75 mΩ Quad Channel Smart High-Side Power Switch Power Stage 5 Power Stage The power stages are built using an N-channel vertical power MOSFET (DMOS) with charge pump. 5.1 Output ON-state Resistance The ON-state resistance RDS(ON) of the power stage depends on supply voltage as well as on junction temperature Tj. Figure 6 shows the influence of temperature on the typical ON-state resistance. The behavior of the power stage in reverse polarity condition is described in Chapter 6.3. Figure 6 Typical ON-state Resistance 5.2 Turn ON/OFF Characteristics with Resistive Load A “High” signal at the input pin (see Chapter 8) causes the power DMOS to switch ON with a dedicated slope, which is optimized in terms of EMC emission. Figure 7 shows the typical timing when switching a resistive load. Figure 7 Switching a Resistive Load Timing −50 0 50 100 150 0 20 40 60 80 100 120 140 160 T j [ °C] IN t VOUT tON tON_delay tOFF 90% VS 10% VS VIN_H VIN_L t Switching times.vsd tOFF_delay 30% VS 70% VS dV/dt ON dV/dt OFF |
Số phần tương tự - ITS4075Q-EP-D |
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Mô tả tương tự - ITS4075Q-EP-D |
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