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EP2AGX45DF25I5 bảng dữ liệu(PDF) 77 Page - Altera Corporation |
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EP2AGX45DF25I5 bảng dữ liệu(HTML) 77 Page - Altera Corporation |
77 / 90 page Chapter 1: Device Datasheet for Arria II Devices 1–69 Switching Characteristics December 2013 Altera Corporation Arria II Device Handbook Volume 3: Device Datasheet and Addendum Table 1–58 lists the DLL frequency range specifications for Arria II GZ devices. Table 1–59 lists the DQS phase offset delay per stage for Arria II GX devices. 5 270-410 270-380 270-320 36 High 10 6 320-450 320-410 320-370 45 High 8 Note to Table 1–57: (1) Low indicates a 6-bit DQS delay setting; high indicates a 5-bit DQS delay setting. Table 1–57. External Memory Interface Specifications for Arria II GX Devices (Part 2 of 2) Frequency Mode Frequency Range (MHz) Resolution (°) DQS Delay Buffer Mode (1) Number of Delay Chains C4 I3, C5, I5 C6 Table 1–58. DLL Frequency Range Specifications for Arria II GZ Devices Frequency Mode Frequency Range (MHz) Available Phase Shift DQS Delay Buffer Mode (1) Number of Delay Chains –3 –4 0 90-130 90-120 22.5°, 45°, 67.5°, 90° Low 16 1 120-170 120-160 30°, 60°, 90°, 120° Low 12 2 150-210 150-200 36°, 72°, 108°, 144° Low 10 3 180-260 180-240 45°, 90°,135°, 180° Low 8 4 240-320 240-290 30°, 60°, 90°, 120° High 12 5 290-380 290-360 36°, 72°, 108°, 144° High 10 6 360-450 360-450 45°, 90°, 135°, 180° High 8 7 470-630 470-590 60°, 120°, 180°, 240° High 6 Note to Table 1–58: (1) Low indicates a 6-bit DQS delay setting; high indicates a 5-bit DQS delay setting. Table 1–59. DQS Phase Offset Delay Per Setting for Arria II GX Devices (Note 1), (2), (3) Speed Grade Min Max Unit C4 7.0 13.0 ps I3, C5, I5 7.0 15.0 ps C6 8.5 18.0 ps Notes to Table 1–59: (1) The valid settings for phase offset are -64 to +63 for frequency modes 0 to 3 and -32 to +31 for frequency modes 4 to 5. (2) The typical value equals the average of the minimum and maximum values. (3) The delay settings are linear. |
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