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NBWLVEP16VR bảng dữ liệu(PDF) 2 Page - ON Semiconductor

tên linh kiện NBWLVEP16VR
Giải thích chi tiết về linh kiện  2.5V/3.3V/5V ECL Differential Receiver/Driver with Oscillator Gain Stage and Enabled High Gain Outputs
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2
Q
Q
D
D
VBB
OD_MODE
EN
Figure 2. Logic Diagram
CS_SEL
QHG
VEE
QHG
VEEP
EN_SEL
Q
Q
0
1
LVCMOS/LVTTL
Threshold
470
W
470
W
10 mA ea. (opt.)
4 mA ea.
4 mA ea. (opt.)
VBB
VBB_ADJ
LEN
LATCH
Q
D
Table 1. Q AND Q INTERNAL CURRENT SOURCE
SELECTOR
CS_SEL
Q
Q
See Figure
OPEN
4 mA Typical
4 mA Typical
13, 13
VEE
8 mA Typical
8 mA Typical
10, 13
VCC
0 mA
4 mA Typical
13, 13
Table 2. QHG AND QHG INTERNAL CURRENT
SOURCE SELECTOR
VEEP
QHG
QHG
See Figure
OPEN
0 mA
0 mA
8, 11
VEE
10 mA Typical
10 mA Typical
9, 12
Table 3. OUTPUT ENABLE AND OUTPUT DISABLED STATE TRUTH TABLE
EN_SEL
OD−MODE*
EN*
Q and Q
QHG
QHG
VCC or OPEN
Low or OPEN
LVPECL Low, VEE or OPEN
Data
Data
Data
VCC or OPEN
Low or OPEN
LVPECL High or VCC
Data
Low
High
VEE
Low or OPEN
LVCMOS Low, VEE, or OPEN
Data
Low
High
VEE
Low or OPEN
LVCMOS High or VCC
Data
Data
Data
VCC or OPEN
High
LVPECL Low, VEE or OPEN
Data
Data
Data
VCC or OPEN
High
LVPECL High or VCC
Data
High
Low
VEE
High
LVCMOS Low, VEE, or OPEN
Data
High
Low
VEE
High
LVCMOS High or VCC
Data
Data
Data
*Pins will default LOW when left open.
†Pin will default HIGH when left open.


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