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MC68030RC25 bảng dữ liệu(PDF) 4 Page - Motorola, Inc

tên linh kiện MC68030RC25
Giải thích chi tiết về linh kiện  ENHANCED 32-BIT MICROPROCESSOR
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MOTOROLA
MC68030 USER’S MANUAL
xxv
TABLE OF CONTENTS
Paragraph
Number
Title
Page
Number
Section 1
Introduction
1.1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-3
1.2
MC68030 Extensions to the M68000 Family . . . . . . . . . . . . . . . . . . . 1-4
1.3
Programming Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-4
1.4
Data Types and Addressing Modes . . . . . . . . . . . . . . . . . . . . . . . . . . 1-10
1.5
Instruction Set Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-10
1.6
Virtual Memory and Virtual Machine Concepts . . . . . . . . . . . . . . . . . 1-12
1.6.1
Virtual Memory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-12
1.6.2
Virtual Machine . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-14
1.7
The Memory Management Unit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-15
1.8
Pipelined Architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-16
1.9
The Cache Memories . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-16
Section 2
Data Organization and Addressing Capabilities
2.1
Instruction Operands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1
2.2
Organization of Data in Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2
2.2.1
Data Registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-2
2.2.2
Address Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-4
2.2.3
Control Registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-4
2.3
Organization of Data in Memory. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-5
2.4
Addressing Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-8
2.4.1
Data Register Direct Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-9
2.4.2
Address Register Direct Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-10
2.4.3
Address Register Indirect Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-10
2.4.4
Address Register Indirect with Postincrement Mode. . . . . . . . . . . . 2-10
2.4.5
Address Register Indirect with Predecrement Mode . . . . . . . . . . . . 2-11
2.4.6
Address Register Indirect with Displacement Mode . . . . . . . . . . . . 2-12
2.4.7
Address Register Indirect with Index (8-Bit Displacement) Mode . . 2-12
2.4.8
Address Register Indirect with Index (Base Displacement) Mode. . 2-13
2.4.9
Memory Indirect Postindexed Mode . . . . . . . . . . . . . . . . . . . . . . . . 2-14
2.4.10
Memory Indirect Preindexed Mode . . . . . . . . . . . . . . . . . . . . . . . . . 2-15
2.4.11
Program Counter Indirect with Displacement Mode . . . . . . . . . . . . 2-16
2.4.12
Program Counter Indirect with Index (8-Bit Displacement) Mode . . 2-16
2.4.13
Program Counter Indirect with Index (Base Displacement) Mode. . 2-17
2.4.14
Program Counter Memory Indirect Postindexed Mode . . . . . . . . . . 2-18
2.4.15
Program Counter Memory Indirect Preindexed Mode . . . . . . . . . . . 2-19
2.4.16
Absolute Short Addressing Mode . . . . . . . . . . . . . . . . . . . . . . . . . . 2-20
2.4.17
Absolute Long Addressing Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . 2-20
2.4.18
Immediate Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-21
2.5
Effective Address Encoding Summary . . . . . . . . . . . . . . . . . . . . . . . . 2-22


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