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TAS5441-Q1 bảng dữ liệu(PDF) 12 Page - Texas Instruments |
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TAS5441-Q1 bảng dữ liệu(HTML) 12 Page - Texas Instruments |
12 / 28 page Discharge (75 ms) Ramp Up (52 ms) Check (50 ms) Ramp Down (52 ms) 12 TAS5441-Q1 SLOSE41 – APRIL 2020 www.ti.com Product Folder Links: TAS5441-Q1 Submit Documentation Feedback Copyright © 2020, Texas Instruments Incorporated 7.3.3 Gate Drive The gate driver accepts the low-voltage PWM signal and level-shifts the signal to drive a high-current, full-bridge, power FET stage. The device uses proprietary techniques to optimize EMI and audio performance. 7.3.4 Power FETs The BTL output comprises four matched N-channel FETs for high efficiency and maximum power transfer to the load. By design, the FETs withstand large voltage transients during a load-dump event. 7.3.5 Load Diagnostics The device incorporates load diagnostic circuitry designed for detecting and determining the status of output connections. The device supports the following diagnostics: • Short to GND • Short to PVDD • Short across load • Open load The device reports the presence of any of the short or open conditions to the system via I2C register read. 7.3.5.1 Load Diagnostics Sequence The load diagnostic function runs on de-assertion of STANDBY or when the device is in a fault state (dc detect, overcurrent, overvoltage, undervoltage, and overtemperature). During this test, the outputs are in a Hi-Z state. The device determines whether the output is a short to GND, short to PVDD, open load, or shorted load. The load diagnostic biases the output, which therefore requires limiting the capacitance value for proper functioning; see the Recommended Operating Conditions. The load diagnostic test takes approximately 229 ms to run. Note that the check phase repeats up to five times if a fault is present or a large capacitor to GND is present on the output. On detection of an open load, the output still operates. On detection of any other fault condition, the output goes into a Hi-Z state, and the device checks the load continuously until removal of the fault condition. After detection of a normal output condition, the audio output starts. The load diagnostics run after every other overvoltage (OV) event. The load diagnostic for open load only has I2C reporting. All other faults have I2C and FAULT pin assertion. The device performs load diagnostic tests as shown in Figure 11. Figure 12 illustrates how the diagnostics determine the load based on output conditions. Figure 11. Load Diagnostics Sequence of Events |
Số phần tương tự - TAS5441-Q1 |
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Mô tả tương tự - TAS5441-Q1 |
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