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SN74HCS09-Q1 bảng dữ liệu(PDF) 8 Page - Texas Instruments |
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SN74HCS09-Q1 bảng dữ liệu(HTML) 8 Page - Texas Instruments |
8 / 16 page One of Four Channels xA xB xY 8 SN74HCS09-Q1 SCLS757 – APRIL 2020 www.ti.com Product Folder Links: SN74HCS09-Q1 Submit Documentation Feedback Copyright © 2020, Texas Instruments Incorporated 8 Detailed Description 8.1 Overview This device contains four independent 2-input AND gates with open-drain outputs and Schmitt-trigger inputs. Each gate performs the Boolean function Y = A ● B in positive logic. 8.2 Functional Block Diagram 8.3 Feature Description 8.3.1 CMOS Open-Drain Outputs The open-drain output allows the device to sink current to GND but not to source current from VCC. When the output is not actively pulling the line low, it will go into a high impedance state. This allows the device to be used for a wide variety of applications, including up-translation and down-translation, as the output voltage can be determined by an external pull-up resistor. The current drive capability of this device creates fast edges into light loads, so routing and load conditions should be considered to prevent ringing. Additionally, the outputs of this device are capable of driving larger currents than the device can sustain without being damaged. It is important for the power output of the device to be limited to avoid thermal runaway and damage due to over-current. The electrical and thermal limits defined the in the Absolute Maximum Ratingsmust be followed at all times. The SN74HCS09-Q1 can drive a load with a total capacitance less than or equal to the maximum load listed in the Switching Characteristics connected to a high-impedance CMOS input while still meeting all of the datasheet specifications. Larger capacitive loads can be applied, however it is not recommended to exceed the provided load value. If larger capacitive loads are required, it is recommended to add a series resistor between the output and the capacitor to limit output current to the values given in the Absolute Maximum Ratings. 8.3.2 CMOS Schmitt-Trigger Inputs Standard CMOS inputs are high impedance and are typically modeled as a resistor from the input to ground in parallel with the input capacitance given in the Electrical Characteristics. The worst case resistance is calculated with the maximum input voltage, given in the Absolute Maximum Ratings, and the maximum input leakage current, given in the Electrical Characteristics, using ohm's law (R = V ÷ I). The Schmitt-trigger input architecture provides hysteresis as defined by ΔVT in the Electrical Characteristics, which makes this device extremely tolerant to slow or noisy inputs. While the inputs can be driven much slower than standard CMOS inputs, it is still recommended to properly terminate unused inputs. Driving the inputs slowly will also increase dynamic current consumption of the device. For additional information regarding Schmitt-trigger inputs, please see Understanding Schmitt Triggers. |
Số phần tương tự - SN74HCS09-Q1 |
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Mô tả tương tự - SN74HCS09-Q1 |
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