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MSP430FR6007 bảng dữ liệu(PDF) 87 Page - Texas Instruments |
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MSP430FR6007 bảng dữ liệu(HTML) 87 Page - Texas Instruments |
87 / 179 page 87 MSP430FR6007, MSP430FR6005 www.ti.com SLASEV3 – MARCH 2020 Submit Documentation Feedback Product Folder Links: MSP430FR6007 MSP430FR6005 Detailed Description Copyright © 2020, Texas Instruments Incorporated 6.13.11 TA2 and TA3 TA2 and TA3 are 16-bit timers and counters (Timer_A type) with two capture/compare registers each and with internal connections only. Each timer can support multiple captures or compares, PWM outputs, and interval timing (see Table 6-15 and Table 6-16). Each timer has extensive interrupt capabilities. Interrupts may be generated from the counter on overflow conditions and from each capture/compare register. Table 6-15. TA2 Signal Connections DEVICE INPUT SIGNAL MODULE INPUT NAME MODULE BLOCK MODULE OUTPUT SIGNAL DEVICE OUTPUT SIGNAL COUT (internal) TACLK Timer N/A ACLK (internal) ACLK SMCLK (internal) SMCLK Reserved INCLK TA3 CCR0 output (internal) CCI0A CCR0 TA0 TA3 CCI0A input ACLK (internal) CCI0B DVSS GND DVCC VCC Reserved CCI1A CCR1 TA1 ADC12 (internal) ADC12SHSx = {5} COUT (internal) CCI1B PPG Trigger (PPGTRIG) SAPH.PGCTL.TRSEL= {2} DVSS GND DVCC VCC Table 6-16. TA3 Signal Connections DEVICE INPUT SIGNAL MODULE INPUT NAME MODULE BLOCK MODULE OUTPUT SIGNAL DEVICE OUTPUT SIGNAL COUT (internal) TACLK Timer N/A ACLK (internal) ACLK SMCLK (internal) SMCLK Reserved INCLK TA2 CCR0 output (internal) CCI0A CCR0 TA0 TA2 CCI0A input ACLK (internal) CCI0B DVSS GND DVCC VCC Reserved CCI1A CCR1 TA1 ADC12 (internal) ADC12SHSx = {6} COUT (internal) CCI1B DVSS GND DVCC VCC |
Số phần tương tự - MSP430FR6007 |
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Mô tả tương tự - MSP430FR6007 |
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