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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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MSP430FG4619 bảng dữ liệu(PDF) 52 Page - Texas Instruments |
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MSP430FG4619 bảng dữ liệu(HTML) 52 Page - Texas Instruments |
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52 / 116 page  7 6 5 4 0 3 2 1 Address 01h rw*0 BTIE UTXIE1 URXIE1 rw*0 rw*0 UCA0TXIE UCA0RXIE rw*0 rw*0 UCB0TXIE UCB0RXIE rw*0 rw*0 7 6 5 4 0 OFIE WDTIE 3 2 1 rw*0 rw*0 rw*0 Address 0h ACCVIE NMIIE rw*0 52 MSP430FG4619, MSP430FG4618, MSP430FG4617, MSP430FG4616 MSP430CG4619, MSP430CG4618, MSP430CG4617, MSP430CG4616 SLAS508K – APRIL 2006 – REVISED MAY 2020 www.ti.com Submit Documentation Feedback Product Folder Links: MSP430FG4619 MSP430FG4618 MSP430FG4617 MSP430FG4616 MSP430CG4619 MSP430CG4618 MSP430CG4617 MSP430CG4616 Detailed Description Copyright © 2006–2020, Texas Instruments Incorporated 6.5 Special Function Registers (SFRs) The MSP430 SFRs are in the lowest address space and are organized as byte mode registers. SFRs should be accessed with byte instructions. Legend rw Bit can be read and written. rw-0, rw-1 Bit can be read and written. It is Reset or Set by PUC. rw-(0), rw-(1) Bit can be read and written. It is Reset or Set by POR. SFR bit is not present in device 6.5.1 Interrupt Enable 1 and 2 WDTIE Watchdog timer interrupt enable. Inactive if watchdog mode is selected. Active if watchdog timer is configured as a general-purpose timer. OFIE Oscillator fault-interrupt enable NMIIE Nonmaskable interrupt enable ACCVIE Flash access violation interrupt enable UCA0RXIE USCI_A0 receive-interrupt enable UCA0TXIE USCI_A0 transmit-interrupt enable UCB0RXIE USCI_B0 receive-interrupt enable UCB0TXIE USCI_B0 transmit-interrupt enable URXIE1 USART1 UART and SPI receive-interrupt enable UTXIE1 USART1 UART and SPI transmit-interrupt enable BTIE Basic timer interrupt enable |
Số phần tương tự - MSP430FG4619_V01 |
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Mô tả tương tự - MSP430FG4619_V01 |
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