MC33567

http://onsemi.com

5

Sense:

If the load is located away from the regulator, the voltage

drop on the connecting cable or trace can become

significant. The MC33567 provides tight voltage load

regulation with varying load currents using it’s SENSE

feature. As shown in Figure 5, the MC33567 senses the

voltage at the load and provides feedback to the regulator.

The regulator voltage is then adjusted to compensate for the

load changes. It is recommended that the SENSE connection

be placed as close as possible to the load. Also, use a separate

trace to connect the source of the N−channel MOSFET to the

load to avoid interference or coupling with the SENSE

signal. The use of the SENSE feature is required for correct

device operation. If the SENSE pin is not connected to the

load, the output will go into Hiccup mode.

The current into the SENSE pin is given by the following

equation:

ISENSE + 100 mA )

Vout

1.8 k

W

Figure 5. Voltage Regulation Using Sense Feature

SENSE

Vin

RL

DRV

Feedback

to

Regulator

1.8 k

W VOUT

+

−

100

mAISENSE

N−Channel MOSFET Selection:

The

MC33567

was

characterized

using

ON Semiconductor’s MTD3055VL N−channel MOSFET.

Other MOSFETs can be used with the MC33567 as long as

power and stability requirements are met.

Power:

A MOSFET with a low drain−source on resistance

(RDS(on)) will insure the output voltage is not drastically

reduced due to excessive voltage drop across the MOSFET.

The required RDS(on) can be calculated using the equation

below:

RDS(on) v 0.5

Vin * Vout

ILOAD

where:

Vin

= Input Voltage, typically 3.3 V

Vout = Regulator Output Voltage

(1.2 V, 1.515 V, 1.818 V, 2.3 V, or 2.525 V)

ILOAD= Load Current

A safety margin of 0.5 was added to account for RDS(on)

variations over the operating temperature range.

Stability:

After evaluating the regulator, driver and load system

using control theory it is demonstrated that the output

capacitor, external driver gain and error amplifier gain

bandwidth play an important role on the system stability. To

insure system stability the following set of design guidelines

should be followed:

Ci + Cgs ) Cgd

wf +

1

Ci ·Ro

wp + 1

w1 )

1

wf

*1

1

20 · 1

)

wa

(3 ·

wp)

· 1

gm v

Rs v

(3 ·

wp)

wa

· 1

gm

Co ·Rs w 5·

1

wa )

1

wp

where:

wf = Driver pole frequency

Ci = Input and reverse transfer capacitance when device

is off

Ro = Regulator output resistance (50 W for the MC33567)

wp = Secondary pole for open loop

wa = Error amplifier gain bandwidth

w1 = Error amp second pole (set w1 = wa, if not specified)

Rs = Output capacitor ESR

gm = Maximum driver transconductance gain

Co = Output capacitance

T

= Overall loop response time