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MC9S08QG8CDTE bảng dữ liệu(PDF) 10 Page - Freescale Semiconductor, Inc

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Giải thích chi tiết về linh kiện  8-BIT HCS08 Central Processor Unit
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MC9S08QG8CDTE bảng dữ liệu(HTML) 10 Page - Freescale Semiconductor, Inc

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MC9S08QG8 and MC9S08QG4 Data Sheet, Rev. 1.01
10
Freescale Semiconductor
Section Number
Title
Page
4.5.4
Burst Program Execution ..................................................................................................46
4.5.5
Access Errors ....................................................................................................................48
4.5.6
FLASH Block Protection ..................................................................................................48
4.5.7
Vector Redirection ............................................................................................................49
4.6
Security ............................................................................................................................................49
4.7
FLASH Registers and Control Bits .................................................................................................51
4.7.1
FLASH Clock Divider Register (FCDIV) ........................................................................51
4.7.2
FLASH Options Register (FOPT and NVOPT) ................................................................52
4.7.3
FLASH Configuration Register (FCNFG) ........................................................................53
4.7.4
FLASH Protection Register (FPROT and NVPROT) .......................................................53
4.7.5
FLASH Status Register (FSTAT) ......................................................................................54
4.7.6
FLASH Command Register (FCMD) ...............................................................................55
Chapter 5
Resets, Interrupts, and General System Control
5.1
Introduction .....................................................................................................................................57
5.2
Features ...........................................................................................................................................57
5.3
MCU Reset ......................................................................................................................................57
5.4
Computer Operating Properly (COP) Watchdog .............................................................................58
5.5
Interrupts .........................................................................................................................................59
5.5.1
Interrupt Stack Frame .......................................................................................................60
5.5.2
External Interrupt Request Pin (IRQ) ...............................................................................60
5.5.3
Interrupt Vectors, Sources, and Local Masks ....................................................................61
5.6
Low-Voltage Detect (LVD) System ................................................................................................63
5.6.1
Power-On Reset Operation ...............................................................................................63
5.6.2
LVD Reset Operation ........................................................................................................63
5.6.3
LVD Interrupt Operation ...................................................................................................63
5.6.4
Low-Voltage Warning (LVW) ...........................................................................................63
5.7
Real-Time Interrupt (RTI) ...............................................................................................................63
5.8
Reset, Interrupt, and System Control Registers and Control Bits ...................................................64
5.8.1
Interrupt Pin Request Status and Control Register (IRQSC) ............................................65
5.8.2
System Reset Status Register (SRS) .................................................................................66
5.8.3
System Background Debug Force Reset Register (SBDFR) ............................................67
5.8.4
System Options Register 1 (SOPT1) ................................................................................68
5.8.5
System Options Register 2 (SOPT2) ................................................................................69
5.8.6
System Device Identification Register (SDIDH, SDIDL) ................................................70
5.8.7
System Real-Time Interrupt Status and Control Register (SRTISC) ................................71
5.8.8
System Power Management Status and Control 1 Register (SPMSC1) ...........................72
5.8.9
System Power Management Status and Control 2 Register (SPMSC2) ...........................73
5.8.10 System Power Management Status and Control 3 Register (SPMSC3) ...........................74


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