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MC34261P bảng dữ liệu(PDF) 6 Page - Motorola, Inc |
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MC34261P bảng dữ liệu(HTML) 6 Page - Motorola, Inc |
6 / 12 page MC34261 MC33261 6 MOTOROLA ANALOG IC DEVICE DATA FUNCTIONAL DESCRIPTION Introduction Most electronic ballasts and switching power supplies use a bridge rectifier and a filter capacitor to derive raw dc voltage from the utility ac line. This simple rectifying circuit draws power from the line when the instantaneous ac voltage exceeds the capacitor’s voltage. This occurs near the line voltage peak and results in a high charge current spike. Since power is only taken near the line voltage peaks, the resulting spikes of current are extremely nonsinusoidal with a high content of harmonics. This results in a poor power factor condition where the apparent input power is much higher than the real power. The MC34261, MC33261 are high performance, critical conduction, current mode power factor controllers specifically designed for use in off–line active preconverters. These devices provide the necessary features required to significantly enhance poor power factor loads by keeping the ac line current sinusoidal and in phase with the line voltage. With proper control of the preconverter, almost any complex load can be made to appear resistive to the ac line, thus significantly reducing the harmonic current content. Operating Description The MC34261, MC33261 contains many of the building blocks and protection features that are employed in modern high performance current mode power supply controllers. There are, however, two areas where there is a major difference when compared to popular devices such as the UC3842 series. Referring to the block diagram in Figure 15, note that a multiplier has been added to the current sense loop and that this device does not contain an oscillator. A description of each of the functional blocks is given below. Error Amplifier A fully compensated Error Amplifier with access to the inverting input and output is provided. It features a typical dc voltage gain of 85 dB, and a unity gain bandwidth of 1.0 MHz with 58 ° of phase margin (Figure 4). The noninverting input is internally biased at 2.5 V ±2.0% and is not pinned out. The output voltage of the power factor converter is typically divided down and monitored by the inverting input. The maximum input bias current is –1.0 µA which can cause an output voltage error that is equal to the product of the input bias current and the value of the upper divider resistor R2. The Error Amp Output is internally connected to the Multiplier and is pinned out (Pin 2) for external loop compensation. Typically, the bandwidth is set below 20 Hz, so that the Error Amp output voltage is relatively constant over a given ac line cycle. The output stage consists of a 500 µA current source pull–up with a Darlington transistor pull–down. It is capable of swinging from 2.1 V to 5.7 V, assuring that the Multiplier can be driven over its entire dynamic range. Multiplier A single quadrant, two input multiplier is the critical element that enables this device to control power factor. The ac haversines are monitored at Pin 3 with respect to ground while the Error Amp output at Pin 2 is monitored with respect to the Voltage Feedback Input threshold. A graph of the Multiplier transfer curve is shown in Figure 1. Note that both inputs are extremely linear over a wide dynamic range, 0 V to 3.2 V for the Multiplier input (Pin 3), and 2.5 V to 4.0 V for the Error Amp output (Pin 2). The Multiplier output controls the Current Sense Comparator threshold (Pin 4) as the ac voltage traverses sinusoidally from zero to peak line. This has the effect of forcing the MOSFET peak current to track the input line voltage, thus making the preconverter load appear to be resistive. Pin 4 Threshold ≈ 0.62(VPin 2 – VFB)VPin 3 Zero Current Detector The MC34261 operates as a critical conduction current mode controller, whereby output switch conduction is initiated by the Zero Current Detector and terminated when the peak inductor current reaches the threshold level established by the Multiplier output. The Zero Current Detector initiates the next on–time by setting the RS Latch at the instant the inductor current reaches zero. This critical conduction mode of operation has two significant benefits. First, since the MOSFET cannot turn on until the inductor current reaches zero, the output rectifier’s reverse recovery time becomes less critical allowing the use of an inexpensive rectifier. Second, since there are no deadtime gaps between cycles, the ac line current is continuous thus limiting the peak switch to twice the average input current. The Zero Current Detector indirectly senses the inductor current by monitoring when the auxiliary winding voltage falls below 1.6 V. To prevent false tripping, 110 mV of hysteresis is provided. The Zero Current Detector input is internally protected by two clamps. The upper 6.7 V clamp prevents input overvoltage breakdown while the lower 0.7 V clamp prevents substrate injection. Device destruction can result if this input is shorted to ground. An external resistor must be used in series with the auxiliary winding to limit the current through the clamps. Current Sense Comparator and RS Latch The Current Sense Comparator RS Latch configuration ensures that only a single pulse appears at the Drive Output during a given cycle. The inductor current is converted to a voltage by inserting a ground referenced sense resistor R9 in series with the source of output switch Q1. This voltage is monitored by the Current Sense Input and compared to the Multiplier output voltage. The peak inductor current is controlled by the threshold voltage of Pin 4 where: Pin 4 Threshold R9 Ipk = With the component values shown in Figure 16, the Current Sense Comparator threshold, at the peak of the haversine varies from 1.1 V at 90 Vac to 100 mV at 268 Vac. The Current Sense Input to Drive Output propagation delay is typically 200 ns. |
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