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MC33349N-7R1 bảng dữ liệu(PDF) 8 Page - ON Semiconductor

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Giải thích chi tiết về linh kiện  Lithium Battery Protection Circuit for One Cell Battery Packs
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MC33349
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8
Figure 20. Excess Current Threshold vs
External Resistance R2
MC33349N–3X / MC33349N–7X
Figure 21. Overvoltage Threshold vs
External Resistance R1
MC33349N–3X
EXTERNAL RESISTANCE R2(k
W)
0.208
0.207
0.204
0.203
0.202
0.5
1
1.5
2
2.5
3
VDD = 3.0V
0
0.205
0.206
EXTERNAL RESISTANCE R1(
W)
4.258
4.256
4.250
4.248
4.246
0
200
400
600
800
1000
C1 = 0 to 0.68
µF
4.252
4.254
0.209
0.210
C3 = 0.22
µF
C3 = 0.01
µF
C3 = 0.1
µF
OPERATING DESCRIPTION
VD1 / Over–Charge Detector
VD1 monitors the voltage at the VCELLpin(VDD).When
it exceeds the over–charge detector threshold, VDET1. VD1
senses an over–charging condition, the CO pin goes to a
”Low”
level,
and
the
external
charge
control,
Nch–MOSFET turns off.
Resetting VD1 allows resumption of the charging
process. VD1 resets under two conditions, thus, making the
CO pin level ”High.” The first case occurs when the cell
voltagedropsbelow”VDET1–VHYS1.”(VHYS1istypically
200 mV). In the second case, disconnecting the charger from
the battery pack can reset VD1 after VDD drops between
”VDET1” and ”VDET1 – VHYS1”.
After detecting over–charge, connecting a load to the
battery pack allows load current to flow through the parasitic
diode of the external charge control FET. The CO level goes
”High” when the cell voltage drops below VDET1duetoload
current draw through the parasitic diode.
An external capacitor connected between the Gnd pin and
Ct pin sets the output delay time for over–charge detection.
The external capacitor sets up a delay time from the moment
of over–charge detection to the time CO outputs a signal,
which enables the charge control FET to turn off. If the
voltage fault occurs within the time delay window. CO will
not turn off the charge control FET. The output delay time
can be calculated as follows:
t
VDET1
[sec]
+ (Ct[F]
(VDD[V]
* 0.7) (0.48
10*6)
A level shifter incorporated in a buffer driver for the CO
pin drives the ”Low” level of CO pin to the P– pin voltage.
A CMOS buffer sets the ”High” level of CO pin to VDD.
VD2 / Over–Discharge Detector
VD2 monitors the voltage at the VCELLpin(VDD).When
it drops below the over–discharge detector threshold,
VDET2, VD2 senses an over–discharge condition, the DO
pin goes to a ”Low” level, and the external discharge control
Nch MOSFET turns off. The IC enters a low current standby
mode after detection of an over–discharged voltage by VD2.
Supply current then reduces to approximately 0.3
µA.
During standby mode, only the charger detector operates.
VD2 can only reset after connecting the pack to a charger.
While VDD remains under the over–discharge detector
threshold, VDET2, discharge current can flow through the
parasitic diode of the external discharge control FET. The
DO level goes ”High” when the cell voltage rises above
VDET2 due to the charging current through the parasitic
diode. Connecting a charger to the battery pack will instantly
set DO ”High” if this causes VDD to rise above VDET2.
When cell voltage equals zero, one can charge the battery
pack if the voltage is greater than the minimum charge
voltage, VST.
Output delay time for the over–discharge detection
(tVDET2)isfixedinternally.Ifthevoltagefaultoccurswithin
the time delay window, DO will not turn off the discharge
control FET.
A CMOS buffer sets the output of the DO pin to a ”High”
level of VDD and a ”Low” level of Gnd.
VD3 / Excess Current Detector, Short Circuit Detector
Both the excess current detector and the short circuit
detector can work when the two control FET’s are on. When
the voltage at the P– pin rises to a value between the short
circuit protection voltage, VSHORT, and the excess current
threshold, VDET3, the excess current detector operates.
Increasing V(P–) higher than VSHORT enables the short
circuit detector. The DO pin then goes to a ”Low” level, and
the external discharge control Nch MOSFET turns off.
Output delay time for excess current detection (tVDET3)is
fixed internally. If the excess current fault occurs within the
time delay window, DO will not turn off the discharge
control FET. However, when the short circuit protector is


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