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X1243S8 bảng dữ liệu(PDF) 11 Page - Intersil Corporation

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Giải thích chi tiết về linh kiện  Real Time Clock/Calendar/Alarm with EEPROM
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11
FN8249.0
April 28, 2005
Device Addressing
Following a start condition, the master must output a Slave
Address Byte. The rst four bits of the Slave Address Byte
specify access to the EEPROM array or to the CCR. Slave
bits ‘1010’ access the EEPROM array. Slave bits ‘1101’
access the CCR.
Bit 3 through Bit 1 of the slave byte specify the device select
bits.These are set to ‘111’.
The last bit of the Slave Address Byte denes the oper-ation
to be performed. When this R/W bit is a one, then a read
operation is selected. A zero selects a write operation. Refer
to Figure 12.
After loading the entire Slave Address Byte from the SDA
bus, the device compares the device identier and device
select bits with ‘1010111’ or ‘1101111’. Upon a correct
compare, the device outputs an acknowledge on the SDA
line.
Following the Slave Byte is a two byte word address. The
word address is either supplied by the master device or
obtained from an internal counter. On power up the internal
address counter is set to address 0h, so a current address
read of the EEPROM array starts at address 0. When
required, as part of a random read, the master device must
supply the 2 Word Address Bytes.
In a random read operation, the slave byte in the “dummy
write” portion must match the slave byte in the “read”
section. That is if the random read is from the array the slave
byte must be ‘1010111x’ in both instances. Similarly, for a
random read of the Clock/ Control Registers, the slave byte
must be ‘1101111x’ in both places.
Data
(2)
S
t
o
p
Slave
Address
Data
(n)
A
C
K
A
C
K
SDA Bus
Signals from
the Slave
Signals from
the Master
1
Data
(n-1)
A
C
K
A
C
K
(n is any integer greater than 1)
Data
(1)
FIGURE 12. SEQUENTIAL READ SEQUENCE
Slave Address Byte
Byte 0
D7
D6
D5
D2
D4
D3
D1
D0
A0
A7
A2
A4
A3
A1
Data Byte
Byte 3
A6
A5
0
0
0
A10
A9
A8
0
1
1
0
1
1
0
1
0
1
1
R/W
1
Device Identifier
Array
CCR
0
High Order Word Address
Byte 1
Low Order Word Address
Byte 2
FIGURE 13. SLAVE ADDRESS, WORD ADDRESS, AND DATA BYTES (64-BYTE PAGES)
X1243


Số phần tương tự - X1243S8

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Mô tả tương tự - X1243S8

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