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MC14490 bảng dữ liệu(PDF) 4 Page - ON Semiconductor

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MC14490
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4
SWITCHING CHARACTERISTICS (5.) (CL = 50 pF, TA = 25_C)
Characteristic
Symbol
VDD
Vdc
Min
Typ (6.)
Max
Unit
Output Rise Time
All Outputs
tTLH
5.0
10
15
180
90
65
360
180
130
ns
Output Fall Time
Oscillator Output
tTHL
5.0
10
15
100
50
40
200
100
80
ns
Debounce Outputs
tTHL
5.0
10
15
60
30
20
120
60
40
Propagation Delay Time
Oscillator Input to Debounce Outputs
tPHL
5.0
10
15
285
120
95
570
240
190
ns
tPLH
5.0
10
15
370
160
120
740
320
240
Clock Frequency (50% Duly Cycle)
(External Clock)
fcl
5.0
10
15
2.8
6
9
1.4
3.0
4.5
MHz
Setup Time (See Figure 1)
tsu
5.0
10
15
100
80
60
50
40
30
ns
Maximum External Clock Input
Rise and Fall Time
Oscillator Input
tr, tf
5.0
10
15
No Limit
ns
Oscillator Frequency
OSCout
Cext ≥ 100 pF*
Note: These equations are intended to be a design guide.
Laboratory experimentation may be required. Formulas
are typically
± 15% of actual frequencies.
fosc, typ
5.0
10
15
1.5
Cext (in mF)
4.5
Cext (in mF)
6.5
Cext (in mF)
Hz
5. The formulas given are for the typical characteristics only at 25
_C.
6. Data labelled “Typ” is not to be used for design purposes but is intended as an indication of the IC’s potential performance.
*POWER–DOWN CONSIDERATIONS
Large values of Cext may cause problems when powering down the MC14490 because of the amount of energy stored in the
capacitor. When a system containing this device is powered down, the capacitor may discharge through the input protection
diodes at Pin 7 or the parasitic diodes at Pin 9. Current through these internal diodes must be limited to 10 mA, therefore the
turn–off time of the power supply must not be faster than t = (VDD – VSS)
 Cext/(10 mA). For example, If VDD – VSS = 15
V and Cext = 1 µF, the power supply must turn off no faster than t = (15 V)
 (1 µF)/10 mA = 1.5 ms. This is usually not a problem
because power supplies are heavily filtered and cannot discharge at this rate.
When a more rapid decrease of the power supply to zero volts occurs, the MC14490 may sustain damage. To avoid this
possibility, use external clamping diodes, D1 and D2, connected as shown in Figure 2.
Figure 1. Switching Waveforms
Figure 2. Discharge Protection During Power Down
OSCin
Aout
Aout
OSCin
Ain
VDD
0 V
VDD
0 V
VDD
0 V
50%
90%
50%
10%
tr
tf
tPHL
90%
10%
50%
50%
tsu
50%
D1
D2
Cext
9
7
OSCin
OSCout
MC14490
tPLH
VDD
VDD


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