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3 / 8 page MC10H641 MC100H641 2–3 MOTOROLA MECL Data DL122 — Rev 6 100H PECL DC CHARACTERISTICS 0 °C 25 °C 85 °C Symbol Characteristic Min Max Min Max Min Max Unit Condition IIH Input HIGH Curren 225 175 175 µA IIL Input LOW Current 0.5 0.5 0.5 µA VIH Input HIGH Voltage 3.835 4.120 3.835 4.120 3.835 4.120 V VE = 5.0V1 VIL Input LOW Voltage 3.190 3.525 3.190 3.525 3.190 3.525 V VE = 5.0V1 VBB Output Reference Voltage 3.62 3.74 3.62 3.74 3.62 3.74 V VE = 5.0V1 1. PECL VIH, VIL, and VBB are referenced to VE and will vary 1:1 with the power supply. The levels shown are for VE = 5.0V. AC CHARACTERISTICS (VT = VE = 5.0V ±5%) TJ = 0°C TJ = + 25°C TJ = + 85°C Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Unit Condition tPLH tPHL Propagation Delay D to Q 5.00 5.36 5.50 5.86 6.00 6.36 4.86 5.27 5.36 5.77 5.86 6.27 5.08 5.43 5.58 5.93 6.08 6.43 ns CL = 50 pF1 tskew Device Skew Part–to–Part Single VCC Output–to–Output 1000 750 350 1000 750 350 1000 750 350 ps CL = 50pF2 CL = 50 pF3 CL = 50 pF4 tPLH tPHL Propagation Delay LEN to Q 4.9 6.9 4.9 6.9 5.0 7.0 ns CL = 50 pF tPLH tPHL Propagation Delay EN to Q 5.0 7.0 4.9 6.9 5.0 7.0 ns CL = 50 pF tr tf Output Rise/Fall 0.8V to 2.0V 1.7 1.6 1.7 1.6 1.7 1.6 ns CL = 50 pF fMAX Max Input Frequency 65 65 65 MHz CL = 50 pF5 tREC Recovery Time EN 1.25 1.25 1.25 ns tS Setup Time 0.75 0.50 0.75 0.50 0.75 0.50 ns tH Hold Time 0.75 0.50 0.75 0.50 0.75 0.50 ns 1. Propagation delay measurement guaranteed for junction temperatures. Measurements performed at 50MHz input frequency. 2. Skew window guaranteed for a single temperature across a VCC = VT = VE of 4.75V to 5.25V (See Application Note in this datasheet). 3. Skew window guaranteed for a single temperature and single VCC = VT = VE 4. Output–to–output skew is specified for identical transitions through the device. 5. Frequency at which output levels will meet a 0.8V to 2.0V minimum swing. DETERMINING SKEW FOR A SPECIFIC APPLICATION The H641 has been designed to meet the needs of very low skew clock distribution applications. In order to optimize the device for this application special considerations are necessary in the determining of the part–to–part skew specification limits. Older standard logic devices are specified with relatively slack limits so that the device can be guaranteed over a wide range of potential environmental conditions. This range of conditions represented all of the potential applications in which the device could be used. The result was a specification limit that in the vast majority of cases was extremely conservative and thus did not allow for an optimum system design. For non–critical skew designs this practice is acceptable, however as the clock speeds of systems increase overly conservative specification limits can kill a design. The following will discuss how users can use the information provided in this data sheet to tailor a part–to–part skew specification limit to their application. The skew determination process may appear somewhat tedious and time consuming, however if the utmost in performance is required this procedure is necessary. For applications which do not require this level of skew performance a generic part–to–part skew limit of 2.5ns can be used. This limit is good for the entire ambient temperature range, the guaranteed VCC (VT, VE) range and the guaranteed operating frequency range. |
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Mô tả tương tự - MC100H641 |
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